MC908GR16VFAE Freescale Semiconductor, MC908GR16VFAE Datasheet - Page 41

• Manufacturer Part Number: MC908GR16VFAE
• Description: IC MCU 16K FLASH 8MHZ 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908GR16VFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: LIN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 37
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 48-LQFP
• Controller Family/series: HC08
• No. Of I/o's: 37
• Ram Memory Size: 1KB
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC08GR
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 4
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

2.6.1.3 FLASH Mass Erase Operation
Use this step-by-step procedure to erase entire FLASH memory to read as a 1:
Programming and erasing of FLASH locations cannot be performed by code being executed from FLASH
memory. While these operations must be performed in the order shown, other unrelated operations may
occur between the steps.
2.6.1.4 FLASH Program/Read Operation
Programming of the FLASH memory is done on a row basis. A row consists of 32 consecutive bytes
starting from addresses $XX00, $XX20, $XX40, $XX60, $XX80, $XXA0, $XXC0, or $XXE0. Use the
following step-by-step procedure to program a row of FLASH memory
Figure 2-4
1. When in monitor mode, with security sequence failed (see
2. The time between each FLASH address change, or the time between the last FLASH address programmed to clearing PGM
Freescale Semiconductor
10. After a time, t
of any FLASH address.
bit, must not exceed the maximum programming time, t
1. Set both the ERASE bit, and the MASS bit in the FLASH control register.
2. Read from the FLASH block protect register.
3. Write any data to any FLASH address
4. Wait for a time, t
5. Set the HVEN bit.
6. Wait for a time, t
7. Clear the ERASE and MASS bits.
8. Wait for a time, t
9. Clear the HVEN bit.
1. Set the PGM bit. This configures the memory for program operation and enables the latching of
2. Read from the FLASH block protect register.
3. Write any data to any FLASH address within the row address range desired.
4. Wait for a time, t
5. Set the HVEN bit.
6. Wait for a time, t
7. Write data to the FLASH address being programmed
address and data for programming.
shows a flowchart of the programming algorithm.
Mass erase is disabled whenever any block is protected (FLBPR does not
equal $FF).
A mass erase will erase the internal oscillator trim value at $FFC0.
RCV
NVS
MErase
NVHL
NVS
PGS
Only bytes which are currently $FF may be programmed.
(minimum 1 μs), the memory can be accessed again in read mode.
(minimum 10 μs)
(minimum 10 μs).
(minimum 5 μs).
(minimum 100 μs)
(minimum 4 ms)
MC68HC908GR16 Data Sheet, Rev. 5.0
(1)
CAUTION
PROG
within the FLASH memory address range.
NOTE
NOTE
19.3.2
maximum.
Security), write to the FLASH block protect register instead
(2)
.
FLASH Memory (FLASH)
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