MC908GR16VFAE Freescale Semiconductor, MC908GR16VFAE Datasheet - Page 42

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MC908GR16VFAE

Manufacturer Part Number
MC908GR16VFAE
Description
IC MCU 16K FLASH 8MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheets

Specifications of MC908GR16VFAE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
LIN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
37
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
48-LQFP
Controller Family/series
HC08
No. Of I/o's
37
Ram Memory Size
1KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08GR
Core
HC08
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
33
Number Of Timers
4
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Memory
This program sequence is repeated throughout the memory until all data is programmed.
Do not exceed t
programming time to the same row before next erase. t
Refer to
The time between programming the FLASH address change (step 7 to step 7), or the time between the
last FLASH programmed to clearing the PGM bit (step 7 to step 10) must not exceed the maximum
programming time, t
42
10. Clear the PGM bit.
11. Wait for a time, t
12. Clear the HVEN bit.
13. After time, t
8. Wait for a time, t
9. Repeat step 7 and 8 until all desired bytes within the row are programmed.
t
NVX
= t
20.15 Memory
NVH
The COP register at location $FFFF should not be written between steps
5-12, when the HVEN bit is set. Since this register is located at a valid
FLASH address, unpredictable behavior may occur if this location is written
while HVEN is set.
Programming and erasing of FLASH locations cannot be performed by
code being executed from the FLASH memory. While these operations
must be performed in the order shown, other unrelated operations may
occur between the steps. Do not exceed t
Memory
It is highly recommended that interrupts be disabled during program/ erase
operations.
Be cautious when programming the FLASH array to ensure that
non-FLASH locations are not used as the address that is written to when
selecting either the desired row address range in step 3 of the algorithm or
the byte to be programmed in step 7 of the algorithm. This applies
particularly to $FFD4–$FFDF.
+ t
PROG
PGS
RCV
PROG
maximum or t
+ (t
(typical 1 μs), the memory can be accessed in read mode again.
PROG
NVH
Characteristics.
Characteristics.
(1)
PROG
maximum.
(minimum 5 μs).
(minimum 30 μs).
x 32) <= t
MC68HC908GR16 Data Sheet, Rev. 5.0
HV
maximum. t
HV
maximum
CAUTION
NOTE
NOTE
HV
is defined as the cumulative high voltage
HV
PROG
must satisfy this condition:
maximum, see
20.15
Freescale Semiconductor

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