ATMEGA163-8AI Atmel, ATMEGA163-8AI Datasheet - Page 163

• Manufacturer Part Number: ATMEGA163-8AI
• Description: IC AVR MCU 16K A/D 8MHZ 44TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA163-8AI

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Two-wire Serial Interface Characteristics
Table 65 describes the requirements for devices connected to the Two-wire Serial Bus. The ATmega163 Two-wire Serial
Interface meets or exceeds these requirements under the noted conditions.
Timing symbols refer to Figure 90.
Table 65. Two-wire Serial Bus Requirements
Notes:
1142E–AVR–02/03
Symbol
V
V
V
V
t
t
I
C
f
t
t
t
t
t
t
t
t
of
SP
i
SCL
HD;STA
LOW
HIGH
SU;STA
HD;DAT
SU;DAT
SU;STO
BUF
IL
IH
hys
OL
i
(1)
(1)
(1)
(1)
(1)
1. In ATmegan163, this parameter is characterized and not 100% tested.
2. Required only for f
3. C
4. f
5. This requirement applies to all ATmega163 Two-wire Serial Interface operation. Other devices connected to the Two-wire
6. The actual low period generated by the ATmega163 Two-wire Serial Interface is (1/f
Serial Bus need only obey the general f
6 MHz for the low time requirement to be strictly met at f
Parameter
Input Low-voltage
Input High-voltage
Hysteresis of Schmitt Trigger Inputs
Output Low-voltage
Output Fall Time from V
Spikes Suppressed by Input Filter
Input Current each I/O Pin
Capacitance for each I/O Pin
SCL Clock Frequency
Hold Time (repeated) START Condition
Low Period of the SCL Clock
High period of the SCL clock
Set–up time for a repeated START condition
Data hold time
Data setup time
Setup time for STOP condition
Bus free time between a STOP and START
condition
CK
b
= capacitance of one bus line in pF.
= CPU clock frequency
SCL
> 100 kHz.
IHmin
to V
ILmax
SCL
requirement.
f
CK
(4)
SCL
10 pF < C
0.1V
> max(16f
3 mA sink current
f
SCL
= 100 kHz.
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
CC
Condition
< V
> 100 kHz
> 100 kHz
> 100 kHz
> 100 kHz
> 100 kHz
> 100 kHz
> 100 kHz
> 100 kHz
100 kHz
b
100 kHz
100 kHz
100 kHz
100 kHz
100 kHz
100 kHz
100 kHz
< 400 pF
SCL
i
< 0.9V
, 250kHz)
(6)
CC
(3)
(5)
SCL
20 + 0.1C
- 2/f
0.05 V
0.7 V
CK
Min
-0.5
250
100
-10
4.0
0.6
4.7
1.3
4.0
0.6
4.7
0.6
4.0
0.6
4.7
1.3
ATmega163(L)
0
0
–
0
0
0
), thus f
CC
CC
b
(2)
(3)(2)
CK
must be greater than
V
0.3 V
CC
Max
50
3.45
250
217
0.4
0.9
10
10
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
+ 0.5
(2)
CC
Units
kHz
µA
pF
ns
ns
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
ns
ns
µs
µs
µs
µs
V
V
V
V
163