ATMEGA163-8AI Atmel, ATMEGA163-8AI Datasheet - Page 62

IC AVR MCU 16K A/D 8MHZ 44TQFP

ATMEGA163-8AI

Manufacturer Part Number
ATMEGA163-8AI
Description
IC AVR MCU 16K A/D 8MHZ 44TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet

Specifications of ATMEGA163-8AI

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA163-8AI
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
EEPROM Read/Write
Access
The EEPROM Address
Register – EEARH and EEARL
The EEPROM Data Register –
EEDR
62
ATmega163(L)
The EEPROM Access Registers are accessible in the I/O space.
The write access time is in the range of 1.9 - 3.8 ms, depending on the V
See Table 24 for details. A self-timing function, however, lets the user software detect
when the next byte can be written. If the user code contains code that writes the
EEPROM, some precautions must be taken. In heavily filtered power supplies, V
likely to rise or fall slowly on Power-up/down. This causes the device for some period of
time to run at a voltage lower than specified as minimum for the clock frequency used.
CPU operation under these conditions is likely to cause the Program Counter to perform
unintentional jumps and potentially execute the EEPROM write code. To secure
EEPROM integrity, the user is advised to use an External under-voltage Reset circuit or
the internal BOD in this case.
In order to prevent unintentional EEPROM writes, a specific write procedure must be fol-
lowed. Refer to the description of the EEPROM Control Register for details on this.
When the EEPROM is read, the CPU is halted for four clock cycles before the next
instruction is executed. When the EEPROM is written, the CPU is halted for two clock
cycles before the next instruction is executed.
• Bits 15..9 – Res: Reserved Bits
These bits are reserved bits in the ATmega163 and will always read as zero.
• Bits 8..0 – EEAR8..0: EEPROM Address
The EEPROM Address Registers – EEARH and EEARL – specify the EEPROM
address in the 512 bytes EEPROM space. The EEPROM data bytes are addressed lin-
early between 0 and 511. The initial value of EEAR is undefined. A proper value must be
written before the EEPROM may be accessed.
• Bits 7..0 – EEDR7.0: EEPROM Data
For the EEPROM write operation, the EEDR Register contains the data to be written to
the EEPROM in the address given by the EEAR Register. For the EEPROM read oper-
ation, the EEDR contains the data read out from the EEPROM at the address given by
EEAR.
Bit
$1F ($3F)
$1E ($3E)
Read/Write
Initial Value
Bit
$1D ($3D)
Read/Write
Initial Value
EEAR7
MSB
R/W
R/W
15
R
X
7
0
7
0
EEAR6
R/W
R/W
14
R
X
6
0
6
0
EEAR5
R/W
R/W
13
5
R
0
X
5
0
EEAR4
R/W
R/W
12
R
4
0
X
4
0
EEAR3
R/W
R/W
11
R
X
3
0
3
0
EEAR2
R/W
R/W
10
R
X
2
0
2
0
EEAR1
R/W
R/W
R
X
9
1
0
1
0
EEAR8
EEAR0
LSB
R/W
R/W
R/W
8
0
X
X
0
0
1142E–AVR–02/03
CC
voltages.
EEARH
EEARL
EEDR
CC
is

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