ATMEGA163-8AI Atmel, ATMEGA163-8AI Datasheet - Page 21

• Manufacturer Part Number: ATMEGA163-8AI
• Description: IC AVR MCU 16K A/D 8MHZ 44TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA163-8AI

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

The Stack Pointer – SP
Reset and Interrupt
Handling
1142E–AVR–02/03
The ATmega163 Stack Pointer is implemented as two 8-bit registers in the I/O space
locations $3E ($5E) and $3D ($5D). As the ATmega163 data memory has $460 loca-
tions, 11 bits are used.
The Stack Pointer points to the data SRAM Stack area where the Subroutine and Inter-
rupt Stacks are located. This Stack space in the data SRAM must be defined by the
program before any subroutine calls are executed or interrupts are enabled. The Stack
Pointer must be set to point above $60. The Stack Pointer is decremented by one when
data is pushed onto the Stack with the PUSH instruction, and it is decremented by two
when the return address is pushed onto the Stack with subroutine call and interrupt. The
Stack Pointer is incremented by one when data is popped from the Stack with the POP
instruction, and it is incremented by two when data is popped from the Stack with return
from subroutine RET or return from interrupt RETI.
The ATmega163 provides 17 different interrupt sources. These interrupts and the sepa-
rate Reset Vector, each have a separate Program Vector in the Program Memory
space. All interrupts are assigned individual enable bits which must be set (one)
together with the I-bit in the Status Register in order to enable the interrupt.
The lowest addresses in the Program Memory space are automatically defined as the
Reset and Interrupt Vectors. The complete list of vectors is shown in Table 3. The list
also determines the priority levels of the different interrupts. The lower the address the
higher is the priority level. RESET has the highest priority, and next is INT0 – the Exter-
nal Interrupt Request 0, etc.
Table 3. Reset and Interrupt Vectors
Bit
$3E ($5E)
$3D ($5D)
Read/Write
Initial Value
Vector No.
10
11
12
1
2
3
4
5
6
7
8
9
Program
Address
SP7
R/W
$000
15
$00A
$00C
$00E
R
$002
$004
$006
$008
$010
$012
$014
$016
–
7
0
0
(1)
SP6
R/W
14
–
6
R
0
0
Source
RESET
INT0
INT1
TIMER2 COMP
TIMER2 OVF
TIMER1 CAPT
TIMER1 COMPA
TIMER1 COMPB
TIMER1 OVF
TIMER0 OVF
SPI, STC
UART, RXC
SP5
R/W
13
R
–
5
0
0
SP4
R/W
12
R
–
4
0
0
Interrupt Definition
External Pin, Power-on Reset, Brown-out
Reset and Watchdog Reset
External Interrupt Request 0
External Interrupt Request 1
Timer/Counter2 Compare Match
Timer/Counter2 Overflow
Timer/Counter1 Capture Event
Timer/Counter1 Compare Match A
Timer/Counter1 Compare Match B
Timer/Counter1 Overflow
Timer/Counter0 Overflow
Serial Transfer Complete
UART, Rx Complete
SP3
R/W
11
R
–
3
0
0
SP10
R/W
R/W
SP2
10
2
0
0
ATmega163(L)
R/W
R/W
SP9
SP1
9
1
0
0
SP8
SP0
R/W
R/W
8
0
0
0
SPH
SPL
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