ATMEGA163-8AI Atmel, ATMEGA163-8AI Datasheet - Page 19

• Manufacturer Part Number: ATMEGA163-8AI
• Description: IC AVR MCU 16K A/D 8MHZ 44TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA163-8AI

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

1142E–AVR–02/03
Table 2. ATmega163 I/O Space (Continued)
Note:
All ATmega163 I/Os and peripherals are placed in the I/O space. The I/O locations are
accessed by the IN and OUT instructions, transferring data between the 32 general pur-
pose working registers and the I/O space. I/O Registers within the address range $00 -
the value of single bits can be checked by using the SBIS and SBIC instructions. Refer
to the instruction set chapter for more details. When using the I/O specific commands IN
and OUT, the I/O addresses $00 - $3F must be used. When addressing I/O Registers as
SRAM, $20 must be added to these addresses. All I/O Register addresses throughout
this document are shown with the SRAM address in parentheses.
For compatibility with future devices, reserved bits should be written to zero if accessed.
Reserved I/O memory addresses should never be written.
Some of the Status Flags are cleared by writing a logical one to them. Note that the CBI
and SBI instructions will operate on all bits in the I/O Register, writing a one back into
any Flag read as set, thus clearing the Flag. The CBI and SBI instructions work with reg-
isters $00 to $1F only.
The I/O and Peripherals Control Registers are explained in the following sections.
$1F are directly bit-accessible using the SBI and CBI instructions. In these registers,
(SRAM Address)
I/O Address
$0D ($2D)
$0C ($2C)
$0F ($2F)
$0E ($2E)
$0B ($2B)
$0A ($2A)
$09 ($29)
$08 ($28)
$07 ($27)
$06 ($26)
$05 ($25)
$04 ($24)
$03 ($23)
$02 ($22)
$01 ($21)
$00 ($20)
1. Reserved and unused locations are not shown in the table.
ADMUX
UCSRA
UCSRB
ADCSR
TWDR
TWAR
TWSR
TWBR
SPDR
UBRR
ACSR
ADCH
Name
SPSR
SPCR
ADCL
UDR
Function
SPI I/O Data Register
SPI Status Register
SPI Control Register
UART I/O Data Register
UART Control and Status Register A
UART Control and Status Register B
UART Baud Rate Register
Analog Comparator Control and Status Register
ADC Multiplexer Select Register
ADC Control and Status Register
ADC Data Register High
ADC Data Register Low
Two-wire Serial Interface Data Register
Two-wire Serial Interface (Slave) Address Register
Two-wire Serial Interface Status Register
Two-wire Serial Interface Bit Rate Register
(1)
ATmega163(L)
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