MCHC11F1CFNE3 Freescale Semiconductor, MCHC11F1CFNE3 Datasheet - Page 40

• Manufacturer Part Number: MCHC11F1CFNE3
• Description: IC MCU 8BIT 1K RAM 68-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MCHC11F1CFNE3

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 3MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 30
• Program Memory Type: ROMless
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.75 V ~ 5.25 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 68-PLCC
• A/d Inputs: 8-Channel, 8-Bit
• Eeprom Memory: 512 Bytes
• Input Output: 30
• Interface: SCI/SPI
• Memory Type: EPROM
• Number Of Bits: 8
• Package Type: 68-pin PLCC
• Programmable Memory: 0 Bytes
• Timers: 3-16-bit
• Voltage, Range: 3-5.5 V
• Controller Family/series: 68HC11
• No. Of I/o's: 30
• Eeprom Memory Size: 512Byte
• Ram Memory Size: 1KB
• Cpu Speed: 3MHz
• No. Of Timers: 1
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC11F
• Core: HC11
• Data Bus Width: 8 bit
• Program Memory Size: 512 B
• Data Ram Size: 1 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 3 MHz
• Number Of Timers: 1
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Program Memory Size: -
• Lead Free Status / Rohs Status: RoHS Compliant part

PCSEN — Program Chip-Select Enable
PSIZA, PSIZB — Select Size of Program Chip-Select
CSGADR — General-Purpose Chip-Select Address Register
GA[15:10] — General-Purpose Chip-Select Starting Address
Bits [1:0] — Not implemented. Reads always return zero and writes have no effect.
CSGSIZ — General-Purpose Chip-Select Size Register
IO1AV — I/O Chip-Select 1 Address Valid
IO2AV — I/O Chip-Select 2 Address Valid
40
RESET:
RESET:
Reset clears PCSEN in single-chip modes and sets PCSEN in expanded modes.
These bits determine the starting address of the CSGEN valid address space and correspond to the
high-order address bits ADDR[15:10]. Table 19 illustrates how the block size selected determines
which of this register's bits are valid.
0 = CSPROG disabled
1 = CSPROG enabled
0 = CSIO1 is valid during E-clock valid time (E-clock high)
1 = CSIO1 is valid during address valid time
0 = CSIO2 is valid during E-clock valid time (E-clock high)
1 = CSIO2 is valid during address valid time
IO1AV
GA15
Bit 7
Bit 7
0
0
PSIZA
Table 19 General Purpose Chip Select Starting Address
IO2AV
0
0
1
1
GA14
6
0
6
0
Freescale Semiconductor, Inc.
Table 18 Program Chip Select Size Control
For More Information On This Product,
CSGEN Block Size
GA13
16 Kbytes
32 Kbytes
64 Kbytes
—
0 Kbytes
2 Kbytes
4 Kbytes
8 Kbytes
5
0
5
0
1 Kbyte
PSIZB
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0
1
0
1
GNPOL
GA12
4
0
4
0
64 Kbytes
32 Kbytes
16 Kbytes
8 Kbytes
GAVLD
Size
GA11
3
0
3
0
CSGADR Bits Valid
GA15 – GA10
GA15 – GA11
GA15 – GA12
GA15 – GA13
GA15 – GA14
GSIZA
GA10
GA15
None
None
2
0
2
1
Address Range
$C000–$FFFF
$E000–$FFFF
$0000–$FFFF
$8000–$FFFF
GSIZB
—
1
0
1
1
MC68HC11F1/FC0
GSIZC
MC68HC11FTS/D
Bit 0
Bit 0
—
0
1
$x05E
$x05F