MCHC11F1CFNE3 Freescale Semiconductor, MCHC11F1CFNE3 Datasheet - Page 46

• Manufacturer Part Number: MCHC11F1CFNE3
• Description: IC MCU 8BIT 1K RAM 68-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MCHC11F1CFNE3

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 3MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 30
• Program Memory Type: ROMless
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.75 V ~ 5.25 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 68-PLCC
• A/d Inputs: 8-Channel, 8-Bit
• Eeprom Memory: 512 Bytes
• Input Output: 30
• Interface: SCI/SPI
• Memory Type: EPROM
• Number Of Bits: 8
• Package Type: 68-pin PLCC
• Programmable Memory: 0 Bytes
• Timers: 3-16-bit
• Voltage, Range: 3-5.5 V
• Controller Family/series: 68HC11
• No. Of I/o's: 30
• Eeprom Memory Size: 512Byte
• Ram Memory Size: 1KB
• Cpu Speed: 3MHz
• No. Of Timers: 1
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC11F
• Core: HC11
• Data Bus Width: 8 bit
• Program Memory Size: 512 B
• Data Ram Size: 1 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 3 MHz
• Number Of Timers: 1
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Program Memory Size: -
• Lead Free Status / Rohs Status: RoHS Compliant part

SCCR1 — SCI Control Register 1
R8 — Receive Data Bit 8
T8 — Transmit Data Bit 8
Bit 5 — Not implemented. Reads always return zero and writes have no effect.
M — Mode (Select Character Format)
WAKE — Wake Up by Address Mark/Idle
Bits [2:0] — Not implemented. Reads always return zero and writes have no effect.
SCCR2 — SCI Control Register 2
TIE — Transmit Interrupt Enable
TCIE — Transmit Complete Interrupt Enable
RIE — Receiver Interrupt Enable
ILIE — Idle Line Interrupt Enable
TE — Transmitter Enable
RE — Receiver Enable
46
RESET:
RESET:
U = Unaffected by reset
If M is set, R8 stores the ninth bit of the receive data character.
If M is set, T8 stores the ninth bit of the transmit data character.
When TE goes from zero to one, one unit of idle character time (logic one) is queued as a preamble.
0 = 1 start bit, 8 data bits, 1 stop bit
1 = 1 start bit, 9 data bits, 1 stop bit
0 = Wake up by IDLE line recognition
1 = Wake up by address mark
0 = TDRE interrupts disabled
1 = SCI interrupt requested when the TDRE flag is set
0 = TC interrupts disabled
1 = SCI interrupt requested when the TC flag is set
0 = RDRF and OR interrupts disabled
1 = SCI interrupt requested when the RDRF flag or the OR flag is set
0 = IDLE interrupts disabled
1 = SCI interrupt requested when IDLE status flag is set
0 = Transmitter disabled
1 = Transmitter enabled
0 = Receiver disabled
1 = Receiver enabled
Bit 7
Bit 7
TIE
R8
U
0
TCIE
T8
U
6
6
0
Freescale Semiconductor, Inc.
For More Information On This Product,
RIE
5
0
0
5
0
Go to: www.freescale.com
ILIE
M
4
0
4
0
WAKE
TE
3
0
3
0
RE
2
0
0
2
0
RWU
1
0
0
1
0
MC68HC11F1/FC0
MC68HC11FTS/D
Bit 0
Bit 0
SBK
0
0
0
$x02C
$x02D