MCHC11F1CFNE3 Freescale Semiconductor, MCHC11F1CFNE3 Datasheet - Page 59

• Manufacturer Part Number: MCHC11F1CFNE3
• Description: IC MCU 8BIT 1K RAM 68-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MCHC11F1CFNE3

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 3MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 30
• Program Memory Type: ROMless
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.75 V ~ 5.25 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 68-PLCC
• A/d Inputs: 8-Channel, 8-Bit
• Eeprom Memory: 512 Bytes
• Input Output: 30
• Interface: SCI/SPI
• Memory Type: EPROM
• Number Of Bits: 8
• Package Type: 68-pin PLCC
• Programmable Memory: 0 Bytes
• Timers: 3-16-bit
• Voltage, Range: 3-5.5 V
• Controller Family/series: 68HC11
• No. Of I/o's: 30
• Eeprom Memory Size: 512Byte
• Ram Memory Size: 1KB
• Cpu Speed: 3MHz
• No. Of Timers: 1
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC11F
• Core: HC11
• Data Bus Width: 8 bit
• Program Memory Size: 512 B
• Data Ram Size: 1 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 3 MHz
• Number Of Timers: 1
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Program Memory Size: -
• Lead Free Status / Rohs Status: RoHS Compliant part

12.2 Timer Registers
CFORC — Timer Force Compare
FOCx — Force Output Compare x Action
Bits [2:0] — Not implemented. Reads always return zero and writes have no effect.
OC1M — Output Compare 1 Mask
OC1M[7:3] — Output Compare Masks
Bits [2:0] — Not implemented. Reads always return zero and writes have no effect.
OC1D — Output Compare 1 Data
OC1D[7:3] — Output Compare Data
Bits [2:0] — Not implemented. Reads always return zero and writes have no effect.
TCNT — Timer Count
MC68HC11F1/FC0
MC68HC11FTS/D
RESET:
RESET:
RESET:
$x00E
$x00F
RESET:
Bits set in OC1M allow OC1 to output the corresponding OC1D bits in port A when a successful com-
pare event occurs.
Data in OC1Dx is output to port A bit x on successful OC1 compares if OC1Mx is set.
The 16-bit read-only TCNT register contains the prescaled value of the 16-bit timer. A full counter read
addresses the most significant byte (MSB) first. A read of this address causes the least significant byte
to be latched into a buffer for the next CPU cycle so that a double-byte read returns the full 16-bit state
of the counter at the time of the MSB read cycle.
0 = Not affected
1 = Output compare x action occurs, but OCxF flag bit is not set
0 = Control of the corresponding port A pin is disabled
1 = Control of the corresponding port A pin is enabled
OC1M7
OC1D7
FOC1
Bit 15
Bit 7
Bit 7
Bit 7
Bit 7
0
0
0
0
OC1M6
OC1D6
FOC2
14
6
0
6
0
6
0
6
0
Freescale Semiconductor, Inc.
For More Information On This Product,
OC1M5
OC1D5
FOC3
13
5
0
5
0
5
0
5
0
Go to: www.freescale.com
OC1M4
OC1D4
FOC4
12
4
0
4
0
4
0
4
0
OC1M3
OC1D3
FOC5
11
3
0
3
0
3
0
3
0
10
2
0
0
2
0
0
2
0
0
2
0
1
0
0
1
0
0
1
0
0
9
1
0
Bit 0
Bit 0
Bit 0
Bit 8
Bit 0
0
0
0
0
0
0
0
$x00E, $x00F
High
Low
$x00B
$x00C
$x00D
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