MCHC11F1CFNE3 Freescale Semiconductor, MCHC11F1CFNE3 Datasheet - Page 65

• Manufacturer Part Number: MCHC11F1CFNE3
• Description: IC MCU 8BIT 1K RAM 68-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MCHC11F1CFNE3

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 3MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 30
• Program Memory Type: ROMless
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.75 V ~ 5.25 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 68-PLCC
• A/d Inputs: 8-Channel, 8-Bit
• Eeprom Memory: 512 Bytes
• Input Output: 30
• Interface: SCI/SPI
• Memory Type: EPROM
• Number Of Bits: 8
• Package Type: 68-pin PLCC
• Programmable Memory: 0 Bytes
• Timers: 3-16-bit
• Voltage, Range: 3-5.5 V
• Controller Family/series: 68HC11
• No. Of I/o's: 30
• Eeprom Memory Size: 512Byte
• Ram Memory Size: 1KB
• Cpu Speed: 3MHz
• No. Of Timers: 1
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC11F
• Core: HC11
• Data Bus Width: 8 bit
• Program Memory Size: 512 B
• Data Ram Size: 1 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 3 MHz
• Number Of Timers: 1
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Program Memory Size: -
• Lead Free Status / Rohs Status: RoHS Compliant part

Bits[7:6] — See 12.2 Timer Registers, page 62.
PAOVI — Pulse Accumulator Overflow Interrupt Enable
PAII — Pulse Accumulator Interrupt Enable
Bits [3:2] — Not implemented. Reads always return zero and writes have no effect.
Bits [1:0] — See 12.2 Timer Registers, page 62.
TFLG2 — Timer Interrupt Flag 2
Bits [7:6] — See 12.2 Timer Registers, page 62.
PAOVF — Pulse Accumulator Overflow Flag
PAIF — Pulse Accumulator Input Edge Flag
Bits [3:0] — Not implemented. Reads always return zero and writes have no effect.
PACTL — Pulse Accumulator Control
Bit 7 — Not implemented. Reads always return zero and writes have no effect.
PAEN — Pulse Accumulator System Enable
PAMOD — Pulse Accumulator Mode
PEDGE — Pulse Accumulator Edge Control
MC68HC11F1/FC0
MC68HC11FTS/D
RESET:
RESET:
Bits in TFLG2 are cleared by writing a one to the corresponding bit positions.
Set when PACNT rolls over from $FF to $00
Set each time a selected active edge is detected on the PAI input line
This bit has different meanings depending on the state of the PAMOD bit, as shown in Table 33.
0 = Pulse accumulator overflow interrupt disabled
1 = Interrupt requested when PAOVF in TFLG2 is set
0 = Pulse accumulator interrupt disabled
1 = Interrupt requested when PAIF in TFLG2 is set
0 = Pulse accumulator disabled
1 = Pulse accumulator enabled
0 = Event counter
1 = Gated time accumulation
Bit 7
TOF
Bit 7
0
0
0
PAEN
RTIF
6
0
6
0
Freescale Semiconductor, Inc.
For More Information On This Product,
PAMOD
PAOVF
5
0
5
0
Go to: www.freescale.com
PEDGE
PAIF
4
0
4
0
3
0
0
3
0
0
I4/O5
2
0
0
2
0
RTR1
1
0
0
1
0
RTR0
Bit 0
Bit 0
0
0
0
$x025
$x026
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