MCF5272VM66 Freescale Semiconductor, MCF5272VM66 Datasheet - Page 361

• Manufacturer Part Number: MCF5272VM66
• Description: IC MPU 66MHZ COLDFIRE 196-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5272VM66

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
• Peripherals: DMA, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (4K x 32)
• Program Memory Type: ROM
• Ram Size: 1K x 32
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 196-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 66MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 3.3V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 196
• Package Type: MA-BGA
• Cpu Speed: 66MHz
• Embedded Interface Type: UART, QSPI, USB, TDM
• Digital Ic Case Style: BGA
• No. Of Pins: 196
• Supply Voltage Range: 3V To 3.6V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Compliant

Chapter 16
UART Modules
This chapter describes the use of the universal asynchronous/synchronous receiver/transmitters (UARTs)
implemented on the MCF5272 and includes programming examples. All references to UART refer to one
of these modules.
16.1
The MCF5272 contains two independent UARTs. Each UART can be clocked by either URT_CLK or
CLKIN, eliminating the need for an external crystal. As
directly to the CPU and consists of the following:
The serial communication channel provides a full-duplex asynchronous/synchronous receiver and
transmitter deriving an operating frequency from CLKIN or an external clock of the correct frequency
(URT_CLK). The transmitter converts parallel data from the CPU to a serial bit stream, inserting
appropriate start, stop, and parity bits. It outputs the resulting stream on the channel transmitter serial data
output (TxD). See
The receiver converts serial data from the channel receiver serial data input (RxD) to parallel format,
checks for a start, stop, and parity bits, or break conditions, and transfers the assembled character onto the
bus during read operations. The receiver may be polled- or interrupt-driven. See
“Receiver.”
Freescale Semiconductor
•
•
•
•
Serial communication channel
Programmable transmitter and receiver clock generation
Internal channel control logic
Interrupt control logic
Overview
System Integration
Module (SIM)
Controller
Interrupt
Section 16.5.2.1,
MCF5272 ColdFire
Figure 16-1. Simplified Block Diagram
Internal Channel
“Transmitting.”
Interrupt Control
Control Logic
®
Integrated Microprocessor User’s Manual, Rev. 3
Logic
UART
Figure 16-1
Communications
Programmable
Generation
Channel
Clock
Serial
shows, each UART module interfaces
URT_CTS
URT_RTS
URT_RxD
URT_TxD
CLKIN
or
External clock (URT_CLK)
Section 16.5.2.2,
16-1