CLRC63201T/0FE,112 NXP Semiconductors, CLRC63201T/0FE,112 Datasheet - Page 14
CLRC63201T/0FE,112
Manufacturer Part Number
CLRC63201T/0FE,112
Description
IC I.CODE HS READER 32-SOIC
Manufacturer
NXP Semiconductors
Series
I-Coder
Specifications of CLRC63201T/0FE,112
Rf Type
Read Only
Frequency
13.56MHz
Features
ISO14443-A, ISO14443-B, ISO15693, ISO18000-3
Package / Case
32-SOIC (0.300", 7.50mm Width)
Product
RFID Readers
Operating Temperature Range
- 25 C to + 85 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-2199-5
935269690112
CLRC632
CLRC63201TD
935269690112
CLRC632
CLRC63201TD
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CLRC63201T/0FE,112
Manufacturer:
IR
Quantity:
3 400
Part Number:
CLRC63201T/0FE,112
Manufacturer:
NXP/恩智浦
Quantity:
20 000
NXP Semiconductors
CLRC632_35
Product data sheet
PUBLIC
9.2.2.1 StartUp register initialization file (read/write)
9.2.2.2 Factory default StartUp register initialization file
Remark: The following points apply to initialization:
The EEPROM memory block address 1 and 2 contents are used to automatically set the
register subaddresses 10h to 2Fh during the initialization phase. The default values stored
in the EEPROM during production are shown in
register initialization
The byte assignment is shown in
Table 14.
During the production tests, the StartUp register initialization file is initialized using the
default values shown in
values are written to the CLRC632’s registers.
EEPROM byte address
10h (block 1, byte 0)
11h
…
2Fh (block 2, byte 15)
•
•
•
the Page register (addressed using 10h, 18h, 20h, 28h) is skipped and not initialized.
make sure that all PreSetxx registers are not changed.
make sure that all register bits that are reserved are set to logic 0.
Byte assignment for register initialization at start-up
file”.
Rev. 3.5 — 10 November 2009
Table
Multiple protocol contactless reader IC (MIFARE/I-CODE1)
15. During each power-up and initialization phase, these
073935
Table
14.
Register address
10h
11h
…
2Fh
Section 9.2.2.2 “Factory default StartUp
CLRC632
© NXP B.V. 2009. All rights reserved.
Remark
skipped
copied
…
copied
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