ISP1161A1BMGA STEricsson, ISP1161A1BMGA Datasheet - Page 111

• Manufacturer Part Number: ISP1161A1BMGA
• Manufacturer: STEricsson

Specifications of ISP1161A1BMGA

• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

16. Power-on reset (POR)
ISP1161A1_5
Product data sheet
When V
typically (600 ns to 1000 ns) + X, when V
with respect to V
To give a better view of the functionality,
with dips at t2–t3 and t4–t5. If the dip at t4–t5 is too short (that is, < 11 μs), the internal
POR pulse will not react and will remain LOW. The internal POR starts with a 1 at t0. At t1,
the detector will see the passing of the trip level and a delay element will add another
t
The internal POR pulse will be generated whenever V
than 11 μs.
Even if V
on-chip voltage regulator ensure that 3.3 V is going to the internal POR circuitry by
clipping the voltage above 3.3 V.
The RESET pin can be either connected to V
externally controlled (by the micro, ASIC, and so on).
Figure 50
PORP
Fig 49. Internal POR timing.
Fig 50. Clock with respect to the external POR.
t0
before it drops to 0.
CC
CC
(1) PORP = power-on reset pulse.
Stable external clock is available at A.
shows the availability of the clock with respect to the external POR.
is directly connected to the RESET pin, the internal pulse width (t
is 5.0 V, V
t1
t
PORP
trip
(2.03 V). The time X is decided by the external power supply circuit.
Rev. 05 — 29 September 2009
trip
EXTERNAL CLOCK
still remains at 2.03 V. This is because the 5 V tolerant pads and
POR
t2
Figure 49
CC
USB single-chip host and device controller
is 3.3 V. X depends on how fast V
CC
t3
t
(using the internal POR circuit) or
PORP
A
shows a possible curve of V
CC(POR)
t4
004aaa365
drops below V
t5
ISP1161A1
© ST-ERICSSON 2009. All rights reserved.
PORP
trip
004aaa389
PORP
V
V
CC
BAT(POR)
trip
CC(POR)
for more
) will be
111 of 137
is rising
(1)