ISP1161A1BMGA STEricsson, ISP1161A1BMGA Datasheet - Page 9

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ISP1161A1BMGA

Manufacturer Part Number
ISP1161A1BMGA
Description
Manufacturer
STEricsson
Datasheet

Specifications of ISP1161A1BMGA

Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant

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ISP1161A1_5
Product data sheet
Table 2.
Symbol
TEST
RESET
NDP_SEL
EOT
DGND
D_SUSPEND
D_WAKEUP
GL
D_VBUS
H_WAKEUP
CLKOUT
H_SUSPEND
XTAL1
XTAL2
DGND
H_PSW1
H_PSW2
D_DM
[1]
Pin description for LQFP64
Pin
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
Rev. 05 — 29 September 2009
Type
O
I
I
I
-
O
I
O
I
I
O
O
I
O
-
O
O
AI/O
Description
test output; used for test purposes only; this pin is not
connected during normal operation
reset input (Schmitt trigger); a LOW level produces an
asynchronous reset (internal pull-up resistor)
Remark: During reset, ensure that all the input pins to the
ISP1161A1 are not toggling and are in their inactive states.
indicates to the HC software the Number of Downstream Ports
(NDP) present:
0 — select 1 downstream port
1 — select 2 downstream ports
only changes the value of the NDP field in the
HcRhDescriptorA register; both ports will always be enabled;
see
(internal pull-up resistor)
DMA master device to inform the ISP1161A1 of end of DMA
transfer; active level is programmable; see
digital ground
DC ‘suspend’ state indicator output; active HIGH
DC wake-up input; generates a remote wake-up from
‘suspend’ state (active HIGH); when not in use, this pin must
be connected to DGND via an external 10 kΩ resistor (internal
pull-down resistor)
GoodLink LED indicator output (open-drain, 8 mA); the LED is
default ON, blinks OFF upon USB traffic; to connect a LED
use a series resistor of 470 Ω (V
(V
DC USB upstream port V
this pin must be connected to DGND via a 1 MΩ resistor
HC wake-up input; generates a remote wake-up from
‘suspend’ state (active HIGH); when not in use, this pin must
be connected to DGND via an external 10 kΩ resistor (internal
pull-down resistor)
programmable clock output (3 MHz to 48 MHz); default
12 MHz
HC ‘suspend’ state indicator output; active HIGH
crystal input; connected directly to a 6 MHz crystal; when
XTAL1 is connected to an external clock source, pin XTAL2
must be left open
crystal output; connected directly to a 6 MHz crystal; when
pin XTAL1 is connected to an external clock source, this pin
must be left open
digital ground
power switching control output for downstream port 1;
open-drain output
power switching control output for downstream port 2;
open-drain output
USB D− data line for DC upstream port; when not in use, this
pin must be left open
CC
Section 10.3.1
= 3.3 V)
…continued
USB single-chip host and device controller
BUS
sensing input; when not in use,
CC
= 5.0 V) or 330 Ω
ISP1161A1
© ST-ERICSSON 2009. All rights reserved.
Section 10.4.1
9 of 137

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