PNX1302EH NXP Semiconductors, PNX1302EH Datasheet - Page 491

• Manufacturer Part Number: PNX1302EH
• Manufacturer: NXP Semiconductors

Specifications of PNX1302EH

• Lead Free Status / RoHS Status: Not Compliant

PNX1300/01/02/11 Data Book
uld8d
SYNTAX
FUNCTION
DESCRIPTION
bits, and writes the result in rdest. The d value is an opcode modifier in the range –64 to 63 inclusive. This operation
does not depend on the bytesex bit in the PCSW since only a single byte is loaded.
defined only for 32-bit loads and stores.
modification of the destination register and the occurrence of side effects. If the LSB of rguard is 1, rdest is written and
the data cache status bits are updated if the addressed location is cacheable. if the LSB of rguard is 0, rdest is not
changed and
EXAMPLES
A-193
r10 = 0xd00, [0xd02] = 0x22
r30 = 0, r20 = 0xd04, [0xd00] = 0x84
r40 = 1, r20 = 0xd04, [0xd00] = 0x84
r50 = 0xd05, [0xd01] = 0x33
The
The result of an access by
The
[ IF rguard ] uld8d(d) rsrc1 → rdest
if rguard then
rdest ← zero_ext8to32(mem[rsrc1 + d])
uld8d
uld8d
Initial Values
uld8d
operation loads the 8-bit memory value from the address computed by rsrc1 + d, zero extends it to 32
operation optionally takes a guard, specified in rguard. If a guard is present, its LSB controls the
has no side effects whatever.
PRELIMINARY SPECIFICATION
uld8d
uld8d(2) r10 → r60
IF r30 uld8d(-4) r20 → r70
IF r40 uld8d(-4) r20 → r80
uld8d(-4) r50 → r90
to the MMIO address aperture is undefined; access to the MMIO aperture is
Operation
Unsigned 8-bit load with displacement
r60 ← 0x000022
no change, since guard is false
r80 ← 0x00000084
r90 ← 0x00000033
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
uld8 ild8 ild8d uld8r
Philips Semiconductors
ATTRIBUTES
SEE ALSO
Result
ild8r
–64..63
dmem
7 bits
4, 5
8
1
3