PEF2054NV21XK Infineon Technologies, PEF2054NV21XK Datasheet - Page 141

• Manufacturer Part Number: PEF2054NV21XK
• Manufacturer: Infineon Technologies

Specifications of PEF2054NV21XK

• Lead Free Status / Rohs Status: Compliant

W:MACR
All PCM time slots shall be set to low impedance (enabled):
W:MADR
W:MACR
In PCM mode 1, bits 7 … 6 and 1 … 0 of PCM port 1, time slot 10 shall be set to low
impedance, bits 5 … 2 to high impedance:
W:MADR
W:MAAR
W:MACR
Figure 51 illustrates the access to the tristate field:
Figure 51
Access to the Data Memory Code (Tristate) Field
Examples
All PCM time slots shall be set to high impedance (disabled):
W:MADR
Semiconductor Group
MAAR:
U/D
MA6
= 00
= 68
= FF
= 68
= 0000 1001
= 1010 1010
= 0110 0000
.
.
H
H
H
H
.
.
.
MA0
B
B
B
U/D = 1
MADR:
; all bits to high impedance
; write access with MOC = 1101
; all bits to low impedance
; write access with MOC = 1101
; bits 7 … 6 and 1 … 0 to low impedance, bits 5 … 2
; address of upstream PCM port 1, time slot 10
; write access with MOC = 1100
to high impedance
according to figure 48
X
X
X
141
X
MD3
Data Memory
Code Field
MD2
MD1
MD0
MACR:
PCM
Frame
0
127
RWS
Up-
stream
1
Application Hints
1 0 0/1
PEB 2055
PEF 2055
0
ITD08066
0
0