PEF2054NV21XK Infineon Technologies, PEF2054NV21XK Datasheet - Page 66

• Manufacturer Part Number: PEF2054NV21XK
• Manufacturer: Infineon Technologies

Specifications of PEF2054NV21XK

• Lead Free Status / Rohs Status: Compliant

Semiconductor Group
Table 4
Time Slot Encoding for Control Memory Accesses
CFI-mode 0
CFI-mode 1
CFI-mode 2
CFI-mode 3
4.2.3.3 Memory Access Data Register (MADR)
Access in demultiplexed P-interface mode:
Access in multiplexed P-interface mode:
Reset value: xx
The Memory Access Data Register MADR contains the data to be transferred from or to
a memory location. The meaning and the structure of this data depends on the kind of
memory being accessed.
bit 7
MD7
MD6
H
MD5
bit U/D
bits MA6..MA3, MA0
bits MA2..MA1
bit U/D
bits MA6..MA3, MA2, MA0
bit MA1
bit U/D
bits MA6..MA0
bit U/D
bits MA6..MA4, MA0
bits MA3..MA1
Control Memory Address
MD4
66
MD3
read/write
read/write
Detailed Register Description
MD2
Direction selection
Time slot selection
Logical CFI port number
Direction selection
Time slot selection
Logical CFI port number
Direction selection
Time slot selection
Direction selection
Time slot selection
Logical CFI port number
address: 2
OMDR:RBS = 0
address: 04
MD1
PEB 2055
PEF 2055
H
bit 0
H
MD0