PEF2054NV21XK Infineon Technologies, PEF2054NV21XK Datasheet - Page 9

no-image

PEF2054NV21XK

Manufacturer Part Number
PEF2054NV21XK
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEF2054NV21XK

Lead Free Status / Rohs Status
Compliant
Handling of Layer-1 Functions
• Change detection for C/I-channel (IOM-configuration) or feature control
• Double last-look logic for C/I-channel (IOM-2 analog configuration)
• Additional last-look logic for feature control (SLD-configuration)
• Buffered monitor (IOM-configuration) or signaling channel (SLD-configuration)
Bus Interface
• Siemens/Intel or Motorola type P-interface
• 8-bit demultiplexed bus interface
• FIFO-access interrupt or DMA controlled
1.2
Figure 1
Pin Configuration EPIC
Semiconductor Group
(SLD-configuration)
Pin Configuration
(top view)
DU3/SIP7
DU2/SIP6
DU1/SIP5
DU0/SIP4
R/W,
DCL
FSC
ALE
WR
INT
CS
A3
®
-1
29
30
31
32
33
34
35
36
37
38
39
28 27 26 25 24 23 22 21 20 19 18
40
41
42
43
PEB 2055
44
EPIC
9
1
R
2
3
4
5
6
17
16
14
13
11
10
15
12
7
9
8
ITP09463
PDC
PFS
TxD3
TSC3
TxD2
TSC2
TxD1
TSC1
TxD0
TSC0
A1
PEB 2055
PEF 2055
Overview

Related parts for PEF2054NV21XK