MC68340AG16E Freescale Semiconductor, MC68340AG16E Datasheet - Page 316

• Manufacturer Part Number: MC68340AG16E
• Description: IC MPU 32BIT 16MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68340AG16E

• Processor Type: M683xx 32-Bit
• Speed: 16MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP
• Controller Family/series: 68K
• Core Size: 32 Bit
• No. Of I/o's: 16
• Cpu Speed: 16MHz
• No. Of Timers: 2
• Embedded Interface Type: UART
• Digital Ic Case Style: LQFP
• Rohs Compliant: Yes
• Processor Series: M683xx
• Core: CPU32
• Maximum Clock Frequency: 16 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Details

Bits 11–8, 6–4—Reserved
SUPV—Supervisor/User
IARB3–IARB0—Interrupt Arbitration Bits
7.4.1.2 INTERRUPT LEVEL REGISTER (ILR). The ILR contains the priority level for the
serial module interrupt request. When the serial module is enabled (i.e., the STP bit in the
MCR is cleared), this register can be read or written to at any time while in supervisor
mode.
Bits 7–3—Reserved
IL2–IL0—Interrupt Level Bits
7.4.1.3 INTERRUPT VECTOR REGISTER (IVR). The IVR contains the 8-bit vector
number of the interrupt. When the serial module is enabled (i.e., the STP bit in the MCR is
cleared), this register can be read or written to at any time while in supervisor mode.
MOTOROLA
The value of this bit has no affect on registers permanently defined as supervisor only.
Each module that generates interrupts has an IARB field. These bits are used to
arbitrate for the bus in the case that two or more modules simultaneously generate an
interrupt at the same priority level. No two modules can share the same IARB value.
The reset value of the IARB field is $0, which prevents this module from arbitrating
during the interrupt acknowledge cycle. The system software should initialize the IARB
field to a value from $F (highest priority) to $1 (lowest priority).
Each module that can generate interrupts has an interrupt level field. The priority level
encoded in these bits is sent to the CPU32 on the appropriate IRQ signal. The CPU32
uses this value to determine servicing priority. The hardware reset value of $00 will not
generate any interrupts. See Section 5 CPU32 for more information.
1 = The serial module registers, which are defined as supervisor or user, reside in
0 = The serial module registers, which are defined as supervisor or user, reside in
supervisor data space and are only accessible from supervisor programs.
user data space and are accessible from either supervisor or user programs.
ILR
Read/Write
RESET:
Freescale Semiconductor, Inc.
7
0
0
For More Information On This Product,
6
0
0
MC68340 USER’S MANUAL
Go to: www.freescale.com
5
0
0
4
0
0
3
0
0
Supervisor Only
IL2
2
0
IL1
1
0
$704
IL0
0
0
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