MC68030FE25C Freescale Semiconductor, MC68030FE25C Datasheet - Page 135

• Manufacturer Part Number: MC68030FE25C
• Description: IC MPU 32BIT ENHANCED 132-CQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68030FE25C

• Processor Type: M680x0 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 132-CQFP
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 132
• Package Type: CQUAD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

5
5.11 EMULATOR SUPPORT SIGNALS
5.11,1 Cache Disable (CDIS)
5.11.2 M M U Disable (MMUDIS)
5.11,3 Pipeline Refill
5.11.4 Internal Microsequencer Status
5-10
for a description of the use of this signal by an emulator. The assertion of
APPLICATIONS INFORMATION for more detailed information on emulation
The cache disable signal dynamically disables the on-chip caches to assist
TIONS INFORMATION for a description of the use of this signalby an emulator.
and become available again when CDIS is negated.
The MMU disable signal dynamically disables the translation of addresses
of address translation; refer to SECTION 12 APPLICATIONS INFORMATION
The pipeline refill signal indicates that the MC68030 is beginning to refill the
The microsequencer status signal indicates the state of the internal micro-
The following signals support emulation by providing a means for an em-
supplying internal status information to an emulator. Refer to SECTION 12
support.
emulator support. Refer to 6.1 ON-CHIP CACHE ORGANIZATION AND OP-
ERATION for information about the caches; refer to SECTION 12 APPLICA-
CDIS does not flush the data and instruction caches; entries remain unaltered
by the MMU. Refer to 9.4 ADDRESS TRANSLATION CACHE for a description
MMUDIS does not flush the address translation cache (ATC); ATC entries
become available again when MMUDIS is negated.
internal instruction pipeline. Refer to SECTION 12 APPLICATIONS INFOR-
MATION for a description of the use of this signal by an emulator.
sequencer. The varying number of clocks for which this signal is asserted
indicates instruction boundaries, pending exceptions, and the halted con-
dition. Refer to SECTION 12 APPLICATIONS INFORMATION for a description
of the use of this signal by an emulator.
ulator to disable the on-chip caches and memory management unit and by
(REFILL)
MC68030 USER'S MANUAL
( S T A T U S )
MOTOROLA