MC68030FE25C Freescale Semiconductor, MC68030FE25C Datasheet - Page 49

• Manufacturer Part Number: MC68030FE25C
• Description: IC MPU 32BIT ENHANCED 132-CQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68030FE25C

• Processor Type: M680x0 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 132-CQFP
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 132
• Package Type: CQUAD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

2
2.2.2 Address Registers
2.2.3 Control Registers
2-4
The status register (SR), shown in Figure 1-4, is 16 bits wide. Only 12 bits of
the status register are defined; all undefined values are reserved by Motorola
for future definition. The undefined bits are read as zeros and should be
contains one digit; the four least significant bits contain the binary value and
the four most significant bits are undefined. Each byte of the packed BCD
format contains two digits; the least significant four bits contain the least
significant digit.
fore, when an address register is used as a source operand, either the low-
order word or the entire long-word operand is used, depending upon the
the entire register is affected, regardless of the operation size. If the source
the operation to an address register destination. Address registers are used
written as zeros for future compatibility. The lower byte of the status register
Each address register and stack pointer is 32 bits wide and holds a 32-bit
address. Address registers cannot be used for byte-sized operands. There-
operation size. When an address register is used as the destination operand,
operand is a word size, it is first sign-extended to 32 bits and then used in
primarily for addresses and to support address computation. The instruction
set includes instructions that add to, subtract from, compare, and move the
contents of address registers. The following example shows the organization
of addresses in address registers.
is the CCR. Operations to the CCR can be performed at the supervisor or user
The control registers described in this section contain control information
for supervisor functions and vary in size. With the exception o f the user
portion of the status register (CCR), they are accessed only by instructions
at the supervisor privilege level.
31
31
Sign-Extended
Address Organization in Address Registers
MC68030 USER'S MANUAL
Fulr 32-Bit Address 0perand
16
I
15
16-Bit Address 0perand
MOTOROLA
0
0
I
I