PEB22504HT-V11 Infineon Technologies, PEB22504HT-V11 Datasheet - Page 54

• Manufacturer Part Number: PEB22504HT-V11
• Description: IC INTERFACE QUAD 100-TQFP
• Manufacturer: Infineon Technologies

Specifications of PEB22504HT-V11

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 100-LFQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEB22504HT-V11; PEB22504HT-V11IN

PEB 22504
QuadLIU V1.1
Interface Description
4.4.8
Alarm Simulation
Alarm simulation does not affect the normal operation of the device. However, real alarm
conditions are not reported to the processor or to the remote end when the device is in
the alarm simulation mode.
The alarm simulation is initiated by setting the bit LIM0.SIM. The following alarms are
simulated:
• Loss of Signal LOS (red alarm)
• Alarm Indication Signal AIS (blue alarm)
• Slip indication
• Code violation counter (AMI, B8ZS, HDB3 Code) increment
• Pulse-density violation
• Transmit clock (TCLK) lost
• PRBS synchronous state indication and PRBS error counter increment
Setting of the bit LIM0.SIM initiates alarm simulation, interrupt status bits are set. Error
counting and indication occurs while this bit is set. After it is reset, all simulated error
conditions disappear, but the generated interrupt statuses are still pending until the
corresponding interrupt status register is read. Alarms such as AIS and LOS are cleared
automatically. Interrupt status register and error counters are cleared automatically on
read.
Data Sheet
54
2001-02