PEB22504HT-V11 Infineon Technologies, PEB22504HT-V11 Datasheet - Page 79

• Manufacturer Part Number: PEB22504HT-V11
• Description: IC INTERFACE QUAD 100-TQFP
• Manufacturer: Infineon Technologies

Specifications of PEB22504HT-V11

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 100-LFQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEB22504HT-V11; PEB22504HT-V11IN

Pulse Count Detection Register (Read/Write)
Addresses: 0C
Value after reset: C0
PCD
PCD(7:0)
Pulse Count Recovery (Read/Write)
Addresses: 0D
Value after reset: 18
PCR
PCR(7:0)
Data Sheet
PCD7
PCR7
7
7
H
H
, 2C
, 2D
Pulse Count Detection
An LOS alarm is detected if the incoming data stream has no
transitions for a programmable number T of consecutive pulse
positions. The number T is programmable via the PCD register and
can be calculated as follows:
T = 16
The maximum time is 256
256
resets the internal pulse counter. The counter is clocked with the
receive clock RCLK.
Pulse Count Recovery
An LOS alarm is cleared if a pulse-density is detected in the received
bit stream. The number of pulses M which must occur in the
predefined PCD time interval is programmable via the PCR register,
and can be calculated as follows:
M = N + 1 ; with 0
The time interval starts with the first detected pulse transition. With
every received pulse, a counter is incremented and the actual counter
is compared with the contents of PCR register. If the pulse number is
greater or equal to the PCR value, the LOS alarm is reset. Otherwise
the alarm stays active. In this case, the next detected pulse transition
starts a new time interval.
H
H
H
H
, 4C
, 4D
16
H
H
, 6C
, 6D
(PCD+1) ; with 0
648 ns = 2.65 ms in T1 mode. Every detected pulse
H
H
N
79
255.
PCD
16
255.
488 ns = 2 ms in E1 mode, or
Register Description
QuadLIU V1.1
PCD0
PCR0
0
0
PEB 22504
2001-02