PEF82912FV1.4 Infineon Technologies, PEF82912FV1.4 Datasheet - Page 189

• Manufacturer Part Number: PEF82912FV1.4
• Description: ISDN Interface ISDN
• Manufacturer: Infineon Technologies

Specifications of PEF82912FV1.4

• Mounting Style: SMD/SMT
• Package / Case: MQFP-64
• Lead Free Status / Rohs Status: Details

STIxy
Note: ST0Vxy and ACKxy are useful for synchronizing microcontroller accesses and
4.9.12
ASTI
Value after reset: 00
ACKxy
4.9.13
MSTI
Value after reset: FF
Data Sheet
STOV21 STOV20 STOV11 STOV10
receive/transmit operations. One BCL clock is equivalent to two DCL clocks.
7
0
7
ASTI - Acknowledge Synchronous Transfer Interrupt
MSTI - Mask Synchronous Transfer Interrupt
Enabled STOV interrupts for a certain STIxy interrupt are generated when
the STIxy has not been acknowledged in time via the ACKxy bit in the ASTI
register. This must be one (for DPS = ‘0’) or zero (for DPS = ‘1’) BCL clock
cycles before the time slot which is selected for the STOV.
Synchronous Transfer Interrupt
Depending on the DPS bit in the corresponding TSDPxy register the
Synchronous Transfer Interrupt STIxy is generated two (for DPS = ‘0’) or
one (for DPS = ‘1’) BCL clock cycles after the selected time slot
(TSDPxy.TSS).
Acknowledge Synchronous Transfer Interrupt
After a STIxy interrupt the microcontroller has to acknowledge the interrupt
by setting the corresponding ACKxy bit.
0 = No activity is initiated
1 = Sets the acknowledge bit ACKxy for a STIxy interrupt
0
H
H
0
0
write
read/write
175
ACK21
STI21
ACK20
STI20
Register Description
PEF 82912/82913
ACK11
STI11
Address:
Address:
2001-03-30
ACK10
STI10
0
0
58
59
H
H