PEF82912FV1.4 Infineon Technologies, PEF82912FV1.4 Datasheet - Page 39

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PEF82912FV1.4

Manufacturer Part Number
PEF82912FV1.4
Description
ISDN Interface ISDN
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEF82912FV1.4

Mounting Style
SMD/SMT
Package / Case
MQFP-64
Lead Free Status / Rohs Status
 Details

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2.2
Figure 9
•.
Figure 9
Reset Source Selection
The internal reset sources C/I code change and Watchdog timer can be output at the low
active reset pin RSTO. These reset sources can be selected with the RSS2,1 bits in the
MODE1 register according to
1)
Data Sheet
The ’OR’-gates shall illustrate in a symbolic way, that ’source A active’ or ’source B active’ is forwarded. The
real polarity of the different sources is not considered.
C/I0 Code Change
(Exchange Awake)
Watchdog
Software Reset
Register (SRES)
Reset
Functional
Block
Internal Reset
of all Registers
shows the organization of the reset generation of the Q-SMINT I.
Reset Generation
Reset Generation of the Q-SMINT I
RES_HDLC
RES_CI
RES_S
RES_U
125µs
t = 125µs
t
250µs
Table
8.
´0´
´1´
RSS1
Reset MODE1
Register
25
´0,0´
´1,x´
RSS2,1
1)
´1´
VDDDET
Deacti-
´0´
vation
Delay
1
Functional Description
1
´0,1´= open
RSS2,1
POR/UVD
´0´
PEF 82912/82913
VDDDET
´1´
RST Pin
RESETGEN.VSD
2001-03-30
RSTO

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