WG82578DM S LGY6 Intel, WG82578DM S LGY6 Datasheet - Page 71
WG82578DM S LGY6
Manufacturer Part Number
WG82578DM S LGY6
Description
Manufacturer
Intel
Datasheet
1.WG82578DM_S_LGY6.pdf
(187 pages)
Specifications of WG82578DM S LGY6
Lead Free Status / Rohs Status
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Programmer’s Visible State—82578 GbE PHY
Table 31.
Table 32.
Table 33.
Cable Defect Tester Status PHY Address 02, Page 0, Register 28
Debug Port Address Offset PHY Address 02, Page 0, Register 29
Debug Port Data PHY Address 02, Page 0, Register 30
15:10
9:8
7:0
15:6
5:0
15:0
Bits
Bits
Bits
Reserved
Address_Offset
Data
Reserved
Status
Delta_Time
Field
Field
Field
R/W
RO
RO
RO
Mode
Mode
RO
R/W
Mode
0x024E
HW Rst
0x00
00b
0x00
HW Rst
0x0000
0x00
HW Rst
SW Rst
0x00
00b
0x00
SW Rst
0x0000
0x00
SW Rst
Data contents of the debug registers as addressed by
the Debug Port Address Offset register.
Reserved
The content of this register applies to the cable pair
selected in the Cable Defect Tester Control register.
00b = Valid test, normal cable (no short or open in
cable).
01b = Valid test, short in cable (impedance < 33 ).
10b = Valid test, open in cable (impedance > 333 ).
11b = Test failed.
Delta time to indicate distance
Reserved
Address index to access the debug registers.
Description
Description
Description
64
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