WG82578DM S LGY6 Intel, WG82578DM S LGY6 Datasheet - Page 77
WG82578DM S LGY6
Manufacturer Part Number
WG82578DM S LGY6
Description
Manufacturer
Intel
Datasheet
1.WG82578DM_S_LGY6.pdf
(187 pages)
Specifications of WG82578DM S LGY6
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Programmer’s Visible State—82578 GbE PHY
Table 49.
Table 50.
Table 51.
Table 52.
This register counts the number of times that a transmit encountered more than one
collision but less than 16. This register only increments if transmits are enabled and the
82578 is in half-duplex mode.
Late Collisions Count - LATECOL PHY Address 01, Page 778, Register 23 - 24
Late collisions are collisions that occur after one slot time. This register only increments
if transmits are enabled and the 82578 is in half-duplex mode.
Collision Count - COLC PHY Address 01, Page 778, Register 25 - 26
This register counts the total number of collisions seen by the transmitter. This register
only increments if transmits are enabled and the 82578 is in half-duplex mode. This
register applies to clear as well as secure traffic.
Defer Count - DC PHY Address 01, Page 778, Register 27 - 28
This register counts defer events. A defer event occurs when the transmitter cannot
immediately send a packet due to the medium busy either because another device is
transmitting, the IPG timer has not expired, half-duplex deferral events, reception of
XOFF frames, or the link is not up. This register only increment if transmits are
enabled. The behavior of this counter is slightly different in the 82578 relative to the
82542. For the 82578, this counter does not increment for streaming transmits that are
deferred due to TX IPG.
Transmit with No CRS - TNCRS PHY Address 01, Page 778, Register 29 - 30
This register counts the number of successful packet transmission in which the CRS
input from the 82578 was not asserted within one slot time of start of transmission
from the MAC. Start of transmission is defined as the assertion of TX_EN to the 82578.
31:0
31:0
31:0
31:0
Bit
Bit
Bit
Bit
RO/V
RO/V
RO/V
RO/V
Type
Type
Type
Type
0x00
0x00
0x00
0x00
Reset
Reset
Reset
Reset
LCC
Number of packets with late collisions.
COLC
Total number of collisions experienced by the transmitter.
CDC
Number of defer events.
TNCRS
Number of transmissions without a CRS assertion from the 82578.
Description
Description
Description
Description
70
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