PEB20534H-10V2.1 Infineon Technologies, PEB20534H-10V2.1 Datasheet - Page 200

• Manufacturer Part Number: PEB20534H-10V2.1
• Description: Communication Controller 208-Pin FQFP
• Manufacturer: Infineon Technologies

After finishing data transmission, Interframe Timefill (SYN characters or IDLE) is
automatically sent.
8.3.4
8.3.4.1
If enabled via register CCR2, a programmable 8-bit pattern (bit field ’PRE’) is transmitted
with a selectable number of repetitions after Interframe Timefill transmission is stopped
and a new frame is ready to be sent out.
Note: If the preamble pattern equals the SYN pattern, reception is triggered by the
8.3.4.2
If the internal CRC generator is not used for calculation of the Frame Check Sequence,
an externally calculated checksum (16 bits) can be appended to the message frame
without internally generated parity information, although parity is enabled for data
characters.
Prerequisites are:
• CRC generator disabled (CAPP = ‘0’),
• Frame/Block End indication has to be issued with the checksum provided in shared
The programmed character length has no influence on this function.
Data Sheet
memory.
preamble.
Special Functions
Preamble Transmission
CRC Parity Inhibit
200
Detailed Protocol Description
PEB 20534
PEF 20534
2000-05-30