C8051T605-GSR Silicon Laboratories Inc, C8051T605-GSR Datasheet - Page 135

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C8051T605-GSR

Manufacturer Part Number
C8051T605-GSR
Description
MCU 8-Bit C8051T60x 8051 CISC 2KB EPROM 1.8V/3V 14-Pin SOIC T/R
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of C8051T605-GSR

Package
14SOIC
Device Core
8051
Family Name
C8051T60x
Maximum Speed
25 MHz
Ram Size
256 Byte
Program Memory Size
2 KB
Operating Supply Voltage
1.8|3 V
Data Bus Width
8 Bit
Program Memory Type
EPROM
Number Of Programmable I/os
8
Interface Type
I2C/SMBus/UART
Operating Temperature
-40 to 85 °C
Number Of Timers
3
1100
1000 1
1110
Values Read
0
0
0
0 X
0
0
0 X
0
1
A master START was gener-
ated.
A master data or address byte
was transmitted; NACK
received.
A master data or address byte
was transmitted; ACK
received.
A master data byte was
received; ACK requested.
Current SMbus State
Table 23.4. SMBus Status Decoding
Rev. 1.2
Load slave address + R/W into
SMB0DAT.
Set STA to restart transfer.
Abort transfer.
Load next data byte into
SMB0DAT.
End transfer with STOP.
End transfer with STOP and start
another transfer.
Send repeated START.
Switch to Master Receiver Mode
(clear SI without writing new data
to SMB0DAT).
Acknowledge received byte;
Read SMB0DAT.
Send NACK to indicate last byte,
and send STOP.
Send NACK to indicate last byte,
and send STOP followed by
START.
Send ACK followed by repeated
START.
Send NACK to indicate last byte,
and send repeated START.
Send ACK and switch to Master
Transmitter Mode (write to
SMB0DAT before clearing SI).
Send NACK and switch to Mas-
ter Transmitter Mode (write to
SMB0DAT before clearing SI).
Typical Response Options
C8051T600/1/2/3/4/5/6
Values to
0
1
0
0
0
1
1
0
0
0
1
1
1
0
0
Write
0 X 1100
0 X
1 X
0 X 1100
1 X
1 X
0 X
0 X 1000
0 1
1 0
1 0
0 1
0 0
0 1
0 0
1000
1100
1100
1110
1110
1110
1110
1110
135

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