C8051T605-GSR Silicon Laboratories Inc, C8051T605-GSR Datasheet - Page 92

• Manufacturer Part Number: C8051T605-GSR
• Description: MCU 8-Bit C8051T60x 8051 CISC 2KB EPROM 1.8V/3V 14-Pin SOIC T/R
• Manufacturer: Silicon Laboratories Inc

Specifications of C8051T605-GSR

• Package: 14SOIC
• Device Core: 8051
• Family Name: C8051T60x
• Maximum Speed: 25 MHz
• Ram Size: 256 Byte
• Program Memory Size: 2 KB
• Operating Supply Voltage: 1.8|3 V
• Data Bus Width: 8 Bit
• Program Memory Type: EPROM
• Number Of Programmable I/os: 8
• Interface Type: I2C/SMBus/UART
• Operating Temperature: -40 to 85 °C
• Number Of Timers: 3

C8051T600/1/2/3/4/5/6
19. Reset Sources
Reset circuitry allows the controller to be easily placed in a predefined default condition. On entry to this
reset state, the following occur:




All SFRs are reset to the predefined values noted in the SFR detailed descriptions. The contents of internal
data memory are unaffected during a reset; any previously stored data is preserved. However, since the
stack pointer SFR is reset, the stack is effectively lost, even though the data on the stack is not altered.
The Port I/O latches are reset to 0xFF (all logic ones) in open-drain mode. Weak pullups are enabled dur-
ing and after the reset. For V
exits the reset state.
On exit from the reset state, the program counter (PC) is reset, and the system clock defaults to the inter-
nal oscillator. The Watchdog Timer is enabled with the system clock divided by 12 as its clock source. Pro-
gram execution begins at location 0x0000.
92
EXTCLK
CIP-51 halts program execution
Special Function Registers (SFRs) are initialized to their defined reset values
External Port pins are forced to a known state
Interrupts and timers are disabled
Frequency
Oscillator
Oscillator
Oscillator
External
Internal
Drive
Low
Px.x
Px.x
Clock Select
System
Clock
DD
Comparator 0
Monitor and power-on resets, the RST pin is driven low until the device
+
-
Figure 19.1. Reset Sources
Detector
Missing
C0RSEF
Clock
(one-
shot)
Microcontroller
EN
Extended Interrupt
CIP-51
Core
Handler
WDT
PCA
EN
Rev. 1.2
VDD
System Reset
Supply
Monitor
+
-
Enable
(Software Reset)
SWRSF
'0'
Power On
Reset
Operation
EPROM
Illegal
(wired-OR)
Reset
Funnel
RST