C8051T605-GSR Silicon Laboratories Inc, C8051T605-GSR Datasheet - Page 162

• Manufacturer Part Number: C8051T605-GSR
• Description: MCU 8-Bit C8051T60x 8051 CISC 2KB EPROM 1.8V/3V 14-Pin SOIC T/R
• Manufacturer: Silicon Laboratories Inc

Specifications of C8051T605-GSR

• Package: 14SOIC
• Device Core: 8051
• Family Name: C8051T60x
• Maximum Speed: 25 MHz
• Ram Size: 256 Byte
• Program Memory Size: 2 KB
• Operating Supply Voltage: 1.8|3 V
• Data Bus Width: 8 Bit
• Program Memory Type: EPROM
• Number Of Programmable I/os: 8
• Interface Type: I2C/SMBus/UART
• Operating Temperature: -40 to 85 °C
• Number Of Timers: 3

C8051T600/1/2/3/4/5/6
26.2. PCA0 Interrupt Sources
Figure 26.3 shows a diagram of the PCA interrupt tree. There are four independent event flags that can be
used to generate a PCA0 interrupt. They are: the main PCA counter overflow flag (CF), which is set upon
a 16-bit overflow of the PCA0 counter, and the individual flags for each PCA channel (CCF0, CCF1, and
CCF2), which are set according to the operation mode of that module. These event flags are always set
when the trigger condition occurs. Each of these flags can be individually selected to generate a PCA0
interrupt, using the corresponding interrupt enable flag (ECF for CF and ECCFn for each CCFn). PCA0
interrupts must be globally enabled before any individual interrupt sources are recognized by the proces-
sor. PCA0 interrupts are globally enabled by setting the EA bit and the EPCA0 bit to logic 1.
162
PCA Counter/Timer 16-
bit Overflow
W
M
P
1
6
n
PCA Module 0
PCA Module 1
PCA Module 2
(for n = 0 to 2)
PCA0CPMn
E
C
O
M
n
C
A
P
P
n
(CCF0)
(CCF1)
(CCF2)
C
A
P
N
n
M
A
T
n
O
G
T
n
P
W
M
n
C
C
E
F
n
C
F
C
R
PCA0CN
Figure 26.3. PCA Interrupt Block Diagram
C
C
F
2
C
C
F
1
C
C
F
0
ECCF0
ECCF1
ECCF2
C
D
L
I
W
D
T
E
PCA0MD
W
D
C
K
L
C
P
S
2
C
P
S
1
0
1
0
1
0
1
C
P
S
0
E
C
F
0
1
Rev. 1.2
EPCA0
0
1
EA
0
1
Interrupt
Priority
Decoder