AT89LP51RB2 Atmel Corporation, AT89LP51RB2 Datasheet - Page 185

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AT89LP51RB2

Manufacturer Part Number
AT89LP51RB2
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT89LP51RB2

Max. Operating Frequency
20 MHz
Cpu
8051-1C
Max I/o Pins
42
Spi
1
Twi (i2c)
1
Uart
1
Adc Channels
7
Adc Resolution (bits)
10
Adc Speed (ksps)
153.8
Sram (kbytes)
1.375
Self Program Memory
API
Operating Voltage (vcc)
2.4 to 5.5
Timers
4
Isp
SPI/OCD/UART
Watchdog
Yes

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24. Flash Memory Programming
3722A–MICRO–10/11
The Atmel AT89LP51RB2/RC2/IC2 microcontroller features 24K/32K bytes of on-chip In-System
Programmable Flash program memory. In-System Programming allows programming and
reprogramming of the microcontroller positioned inside the end system. The programmer com-
municates serially with the AT89LP51RB2/RC2/IC2 microcontroller, reprogramming all
nonvolatile memories on the chip. In-System Programming eliminates the need for physical
removal of the chips from the system. This will save time and money, both during development
i n t h e l a b , a n d w h e n u p d a t i n g t h e s o f t w a r e o r p a r a m e t e r s i n t h e f i e l d . T h e
AT89LP51RB2/RC2/IC2 provides the following programming interfaces:
None of the programming interfaces require an external dedicated programming voltage. The
necessary high programming voltage is generated on-chip using the standard V
microcontroller.
Note:
• High-Speed, four-wire SPI-based programming interface (ISP)
• 12-pin parallel programming interface (PRL)
• ROM-based UART serial bootloader (BOOT)
• User-defined bootloader and/or In-Application Programming (IAP)
This synchronous hardware interface programs the device while it is in reset and therefore,
does not require the CPU to be operational, i.e. no clock is required except the SPI serial
clock. This interface can be used both in-system and in a stand-alone programmer, and has
full access to all nonvolatile memory resources. This interface is compatible with the Atmel
AT89LP ISP Studio software. See
for more information.
This interface is a submode of the SPI interface that allows data to be read/written one 8-bit
byte at a time instead of serially 1-bit at a time. This interface is intended only for stand-alone
programmers. An 87C51-compatible parallel interface is not available. See
“Physical Interface” on page 214
When using this 2-pin asynchronous interface, the device runs a default software bootloader
from an on-chip ROM. The system clock must be operational and will limit the speed at which
the interface functions. This interface is intended for in-system use. It has full access to the
Flash code memory, but does not have access to all configuration options. This interface is
compatible with the Atmel FLIP software. See
more information.
The ROM bootloader can call a user-defined bootloader located within the code memory
instead of the default UART bootloader. The user is free to use any available interface to
program the device. The ROM also contains an application programming interface (API) that
implements the low-level routines necessary to perform in-application programming (IAP). It
is recommended that users employ these functions instead of writing their own low-level
routines. Advanced users may wish to implement their own routines in some cases. See
Section 24.4 “In-Application Programming (IAP)” on page
In this document the term Bootloader, or BOOT, is used to when referring to the UART-based
ROM bootloader and In-System Programming, or ISP, is used with reference to the SPI-based
interface. This is different from AT89C51RB2/RC2/IC2 where ISP also referred to the bootloader
(as no SPI programming interface was present). However, it should be noted that both interfaces
are perfectly capable of performing in-system programming, i.e programming the device when it is
already mounted in the final end-user system.
AT89LP51RB2/RC2/IC2 Preliminary
for more information.
Section 24.6 “In-System Programming (ISP)” on page 214
Section 24.5 “Bootloader” on page 199
190.
Section 24.6.1
DD
pin of the
for
185

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