AT89LP51RB2 Atmel Corporation, AT89LP51RB2 Datasheet - Page 54

• Manufacturer Part Number: AT89LP51RB2
• Manufacturer: Atmel Corporation

Specifications of AT89LP51RB2

• Max. Operating Frequency: 20 MHz
• Cpu: 8051-1C
• Max I/o Pins: 42
• Spi: 1
• Twi (i2c): 1
• Uart: 1
• Adc Channels: 7
• Adc Resolution (bits): 10
• Adc Speed (ksps): 153.8
• Sram (kbytes): 1.375
• Self Program Memory: API
• Operating Voltage (vcc): 2.4 to 5.5
• Timers: 4
• Isp: SPI/OCD/UART
• Watchdog: Yes

7.4
7.5
7.6
54
Hardware Watchdog Reset
PCA Watchdog Reset
Software Reset
AT89LP51RB2/RC2/IC2 Preliminary
When the Hardware Watchdog times out, it will generate a reset pulse lasting 49 clock cycles.
By default this pulse is also output on the RST pin. The output pulse is either open-drain or
open-source as shown in
board in the case of an external capacitor or power-supply supervisor circuit, a 1 kΩ resistor
should be placed in series with any external driving circuitry as shown in
the RST output the DISRTO bit in the WDTPRG register must be set to one. Watchdog reset will
set the WDTOVF flag in WDTPRG. To prevent a Watchdog reset, the watchdog reset sequence
1EH/E1H must be written to WDTRST before the Watchdog times out. See
104
Figure 7-5.
Module 4 of the Programmable Counter Array (PCA) can be configured as a watchdog timer.
When a compare match occurs between module 4 and the PCA timer, it will generate an internal
reset pulse lasting 16 clock cycles. This pulse is never output on the RST pin. See
on page 104
The CPU may generate a 49-clock cycle reset pulse by writing the software reset sequence
5AH/A5H to the WDRST register. A software reset will set the SWRST bit in WDTPRG. See
“Software Reset” on page 105
other than 5AH/A5H or 1EH/E1H to WDTRST will generate an immediate reset and set both
WDTOVF and SWRST to flag an error. Software reset will also drive the RST pin active unless
DISRTO is set.
for details on the operation of the Watchdog.
Vcc
RST
Vcc
+
for details on the operation of the PCA Watchdog.
Recommended Reset Output Schematics
1 kΩ
Figure
RST
for more information on software reset. Writing any sequences
AT89LP51xD2
7-4. In order to properly propagate this pulse to the rest of the
To other
on-board
circuitry
POL = 1
Vcc
RST
+
1 kΩ
Figure
Section 16. on page
RST
3722A–MICRO–10/11
AT89LP51xD2
7-5. To disable
To other
on-board
circuitry
Section 15.7
POL = 0