AT90PWM161 Atmel Corporation, AT90PWM161 Datasheet - Page 56

• Manufacturer Part Number: AT90PWM161
• Manufacturer: Atmel Corporation

Specifications of AT90PWM161

• Flash (kbytes): 16 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 20
• Ext Interrupts: 3
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 125
• Analog Comparators: 3
• Resistive Touch Screen: No
• Dac Channels: 1
• Dac Resolution (bits): 10
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.25
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 125
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 1
• Output Compare Channels: 8
• Input Capture Channels: 1
• Pwm Channels: 6
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

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AT90PWM81
In Interrupt mode, the WDT gives an interrupt when the timer expires. This interrupt can be used to wake
the device from sleep-modes, and also as a general system timer. One example is to limit the maximum
time allowed for certain operations, giving an interrupt when the operation has run longer than expected.
In System Reset mode, the WDT gives a reset when the timer expires. This is typically used to prevent
system hang-up in case of runaway code. The third mode, Interrupt and System Reset mode, combines the
other two modes by first giving an interrupt and then switch to System Reset mode. This mode will for
instance allow a safe shutdown by saving critical parameters before a system reset.
The “Watchdog Timer Always On” (WDTON) fuse, if programmed, will force the Watchdog Timer to
System Reset mode. With the fuse programmed the System Reset mode bit (WDE) and Interrupt mode bit
(WDIE) are locked to 1 and 0 respectively. To further ensure program security, alterations to the Watch-
dog set-up must follow timed sequences. The sequence for clearing WDE and changing time-out
configuration is as follows:
The following code example shows one assembly and one C function for turning off the Watchdog Timer.
The example assumes that interrupts are controlled (e.g. by disabling interrupts globally) so that no inter-
rupts will occur during the execution of these functions.
Assembly Code Example
1.
2.
In the same operation, write a logic one to the Watchdog change enable bit (WDCE) and WDE.
A logic one must be written to WDE regardless of the previous value of the WDE bit.
Within the next four clock cycles, write the WDE and Watchdog prescaler bits (WDP) as
desired, but with the WDCE bit cleared. This must be done in one operation.
(1)
7734P–AVR–08/10