ATmega64M1 Atmel Corporation, ATmega64M1 Datasheet - Page 249

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ATmega64M1

Manufacturer Part Number
ATmega64M1
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega64M1

Flash (kbytes)
64 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
27
Ext Interrupts
27
Usb Speed
No
Usb Interface
No
Spi
1
Uart
1
Can
1
Lin
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
14
Input Capture Channels
1
Pwm Channels
10
32khz Rtc
No
Calibrated Rc Oscillator
Yes

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21.10.10 AMP2CSR – Amplifier 2 Control and Status register
8209D–AVR–11/10
• Bit 3 – AMPCMP1: Amplifier 1 - Comparator 1 connection
Set this bit to connect the amplifier 1 to the comparator 1 positive input. In this configuration the
comparator clock is adapted to the amplifier clock and AMP1TS2,AMP1TS1, AMP1TS0 bits
have no effect.
Clear this bit to normally use the Amplifier 1.
• Bit 2:0 – AMP1TS[2:0]: Amplifier 1 Clock Source Selection Bits
In accordance with the
for the amplifier 1. This clock source is necessary to start the conversion on the amplified
channel.
Table 21-11. AMP1 Clock Source Selection
Bit
Read/Write
Initial Value
• Bit 7 – AMP2EN: Amplifier 2 Enable Bit
Set this bit to enable the Amplifier 2.
Clear this bit to disable the Amplifier 2.
Clearing this bit while a conversion is running will take effect at the end of the conversion.
Warning: Always clear AMP2TS0:1 when clearing AMP2EN.
• Bit 6 – AMP2IS: Amplifier 2 Input Shunt
Set this bit to short-circuit the Amplifier 2 input.
Clear this bit to normally use the Amplifier 2.
• Bit 5:4 – AMP2G[1:0]: Amplifier 2 Gain Selection Bits
These 2 bits determine the gain of the amplifier 2.
The different setting are shown in
AMP1TS[2:0]
000
001
010
011
100
101
110
111
AMP2EN
R/W
7
0
Table
AMP2IS
R/W
6
0
21-11, these 3 bits select the event which will generate the clock
AMP2G1
Table 21-12 on page
R/W
PSC Module 0 Synchronization Signal (PSS0)
PSC Module 1 Synchronization Signal (PSS1)
PSC Module 2 Synchronization Signal (PSS2)
5
0
Timer/Counter1 Compare Match B
Timer/Counter0 Compare Match
AMP2G0
R/W
4
0
Timer/Counter0 Overflow
Timer/Counter1 Overflow
ATmega16M1/32M1/64M1
Clock Source
AMPCMP2
ADC Clock/8
R/W
3
0
250.
AMP2TS2
R/W
2
0
AMP2TS1
R/W
1
0
AMP2TS0
R/W
0
0
AMP2CSR
249

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