ATmega64M1 Atmel Corporation, ATmega64M1 Datasheet - Page 254

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ATmega64M1

Manufacturer Part Number
ATmega64M1
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega64M1

Flash (kbytes)
64 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
27
Ext Interrupts
27
Usb Speed
No
Usb Interface
No
Spi
1
Uart
1
Can
1
Lin
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
14
Input Capture Channels
1
Pwm Channels
10
32khz Rtc
No
Calibrated Rc Oscillator
Yes

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23. AC – Analog Comparator
23.1
23.2
254
Features
Overview
ATmega16M1/32M1/64M1
The ATmega16M1/32M1/64M1 features 4 fast analog comparators. The Analog Comparator
compares the input values on the positive pin ACMPx and negative pin ACMPM or ACMPMx.
Each comparator has a dedicated input on the positive input, and the negative input of each
comparator can be configured as:
When the voltage on the positive ACMPn pin is higher than the voltage selected by the ACnM
multiplexer on the negative input, the Analog Comparator output, ACnO, is set.
The comparator is a clocked comparator. A new comparison is done on the falling edge of
CLK
ator Status Register” on page 260.
Each comparator can trigger a separate interrupt, exclusive to the Analog Comparator. In addi-
tion, the user can select Interrupt triggering on comparator output rise, fall or toggle.
The interrupt flags can also be used to synchronize ADC or DAC conversions.
Moreover, the comparator’s output of the comparator 1 can be set to trigger the Timer/Counter1
Input Capture function.
A block diagram of the four comparators and their surrounding logic is shown in
page
• a steady value among the 4 internal reference levels defined by the Vref selected thanks to
• a value generated from the internal DAC
• an external analog input ACMPMx
4 Analog Comparators
High Speed Clocked Comparators
±30mV Hysteresys
4 reference levels
Generation of Configurable Interrupts
the REFS1:0 bits in ADMUX register
I/O
255.
or CLK
I/O
/2. Depending on ACCKDIV fit of ACSR register,
See “ACSR – Analog Compar-
Figure 23-1 on
8209D–AVR–11/10

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