ATxmega256A3BU Atmel Corporation, ATxmega256A3BU Datasheet - Page 151

• Manufacturer Part Number: ATxmega256A3BU
• Manufacturer: Atmel Corporation

Specifications of ATxmega256A3BU

• Flash (kbytes): 256 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 47
• Ext Interrupts: 49
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 8
• Twi (i2c): 2
• Uart: 6
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 16
• Eeprom (bytes): 4096
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 7
• Output Compare Channels: 22
• Input Capture Channels: 22
• Pwm Channels: 22
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

13.13.8
13.13.9
13.13.10 INTCTRL – Interrupt Control Register
13.13.11 INT0MASK – Interrupt 0 Mask Register
8331A–AVR–07/11
OUTTGL – Data Output Value Toggle Register
IN – Data Input Value Register
• Bit 7:0 – OUTTGL[7:0]: Port Data Output Value Toggle
This register can be used instead of a read-modify-write to toggle the output value of individual
pins. Writing a one to a bit will toggle the corresponding bit in the OUT register. Reading this reg-
ister will return the value in the OUT register.
• Bit 7:0 – IN[7:0]: Data Input Value
This register shows the value present on the pins if the digital input driver is enabled. INn shows
the value of pin n of the port. The input is not sampled and cannot be read if the digital input buf-
fers are disabled.
• Bit 7:4 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always
write these bits to zero when this register is written.
• Bit 3:2/1:0 – INTnLVL[1:0]: Interrupt n Level
These bits enable port interrupt n and select the interrupt level as described in
Programmable Multilevel Interrupt Controller” on page
Bit
+0x07
Read/Write
Initial Value
Bit
+0x08
Read/Write
Initial Value
Bit
+0x09
Read/Write
Initial Value
Bit
+0x0A
Read/Write
Initial Value
R/W
R/W
7
0
7
R
0
7
–
R
0
7
0
R/W
R/W
6
0
6
R
0
6
–
R
0
6
0
R/W
R/W
5
0
R
R
5
0
5
–
0
5
0
R/W
R/W
4
0
R
R
4
0
4
–
0
4
0
OUTTGL[7:0]
INT0MSK[7:0]
IN[7:0]
R/W
R/W
R/W
Atmel AVR XMEGA AU
3
0
R
3
0
3
0
3
0
INT1LVL[1:0]
132.
R/W
R/W
R/W
2
0
R
2
0
2
0
0
2
R/W
R/W
R/W
R
1
0
1
0
1
0
1
0
INT0LVL[1:0]
R/W
R/W
R/W
”Interrupts and
R
0
0
0
0
0
0
0
0
INT0MASK
INTCTRL
OUTTGL
IN
151