ST7MC2M9 STMicroelectronics, ST7MC2M9 Datasheet - Page 28

• Manufacturer Part Number: ST7MC2M9
• Description: 8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC,BRUSHLESS MOTOR CONTROL, 5 TIMERS, SPI, LINSCI(TM)
• Manufacturer: STMicroelectronics

Specifications of ST7MC2M9

• Hdflash Endurance: 100 cycles, data retention
• Clock Sources: crystal/ceramic resonator oscillators and by-pass for external clock, clock security system.
• Four Power Saving Modes: Halt, Active-Halt, Wait and Slow
• Main Clock Controller With: Real time base, Beep and Clock-out capabilities
• Two 16-bit Timers With: 2 input captures, 2 output compares, external clock input, PWM and pulse generator modes
• 8-bit Pwm Auto-reload Timer With: 2 input captures, 4 PWM outputs, output compare and time base interrupt, external clock with event detector

ST7MC1xx/ST7MC2xx
6 SUPPLY, RESET AND CLOCK MANAGEMENT
The device includes a range of utility features for
securing the application in critical situations (for
example in case of a power brown-out), and re-
ducing the number of external components. An
overview is shown in
For more details, refer to dedicated parametric
section.
Figure 13. Clock, Reset and Supply Block Diagram
28/309
1
* It is recommended to decouple the power supply by placing a 0.1µF capacitor as close as possible to V
RESET
OSC2
OSC1
V
V
SS
DD
*
Figure
OSCILLATOR
RESET SEQUENCE
MANAGER
(RSM)
13.
f
OSC
1/2
DIV2 OPT
SICSR, page 0
CLOCK SECURITY SYSTEM
PA
GE
Clock Detector
8Mhz
AVD AVD LVD
IE
Main features
■
■
■
AVD Interrupt Request
– Main supply Low voltage detection (LVD)
– Auxiliary Voltage detector (AVD) with interrupt
– Clock Security System (CSS) with the VCO of
– Clock Detector
– PLL which can be used to multiply the fre-
Reset Sequence Manager (RSM)
1 Crystal/Ceramic resonator oscillator
System Integrity Management (SI)
PLL
AUXILIARY VOLTAGE
Safeosc
F
capability for monitoring the main supply
the PLL, providing a backup safe oscillator
quency by 2 if the clock frequency input is
8MHz
SICSR, page 1
LOW VOLTAGE
SYSTEM
RF
GE
PA
DETECTOR
DETECTOR
(AVD)
(LVD)
0
0
INTEGRITY MANAGEMENT
VCO
CSS
EN
IE
CSS Interrupt Request
16Mhz
lock
CSS
CK
LO
f
D
OSC
WDG
PLL
EN
RF
CKSEL
f
DD
CLK
0
CLOCK (MCC/RTC)
SEL
CK
WITH REALTIME
TIMER (WDG)
CONTROLLER
WATCHDOG
MAIN CLOCK
0
f
f
CPU
MTC