ST7MC2M9 STMicroelectronics, ST7MC2M9 Datasheet - Page 44

• Manufacturer Part Number: ST7MC2M9
• Description: 8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC,BRUSHLESS MOTOR CONTROL, 5 TIMERS, SPI, LINSCI(TM)
• Manufacturer: STMicroelectronics

Specifications of ST7MC2M9

• Hdflash Endurance: 100 cycles, data retention
• Clock Sources: crystal/ceramic resonator oscillators and by-pass for external clock, clock security system.
• Four Power Saving Modes: Halt, Active-Halt, Wait and Slow
• Main Clock Controller With: Real time base, Beep and Clock-out capabilities
• Two 16-bit Timers With: 2 input captures, 2 output compares, external clock input, PWM and pulse generator modes
• 8-bit Pwm Auto-reload Timer With: 2 input captures, 4 PWM outputs, output compare and time base interrupt, external clock with event detector

ST7MC1xx/ST7MC2xx
INTERRUPTS (Cont’d)
Table 7. Dedicated Interrupt Instruction Set
Note: During the execution of an interrupt routine, the HALT, POPCC, RIM, SIM and WFI instructions change the current
software priority up to the next IRET instruction or one of the previously mentioned instructions.
Table 8. Interrupt Mapping
Note 1. Valid for Halt and Active-halt modes except for the MCC/RTC or CSS interrupt source which exits from Active-
halt mode only.
44/309
1
Instruction
HALT
IRET
JRM
JRNM
POP CC
RIM
SIM
TRAP
WFI
N°
10
11
12
13
0
1
2
3
4
5
6
7
8
9
MCC/RTC
LINSCI™
PWM ART
TIMER A
TIMER B
Source
RESET
MCES
Block
TRAP
AVD/
MTC
ADC
CSS
SPI
ei0
ei1
ei2
Entering Halt mode
Interrupt routine return
Jump if I1:0=11 (level 3)
Jump if I1:0<>11
Pop CC from the Stack
Enable interrupt (level 0 set)
Disable interrupt (level 3 set)
Software trap
Wait for interrupt
Reset
Software interrupt
Motor Control Emergency Stop
or Speed error interrupt
Main clock controller time base interrupt
Safe oscillator activation interrupt
External interrupt port
External interrupt port
External interrupt port
Event U or Current Loop or Sampling Out MISR/MCONF
Event R or Event Z
Event C or Event D
SPI peripheral interrupts
TIMER A peripheral interrupts
TIMER B peripheral interrupts
LINSCI™
Auxiliary Voltage detector interrupt
ADC End of conversion interrupt
PWM ART overflow interrupt
PWM ART input capture interrupts
New Description
Peripheral interrupts
Description
Pop CC, A, X, PC
I1:0=11 ?
I1:0<>11 ?
Mem => CC
Load 10 in I1:0 of CC
Load 11 in I1:0 of CC
Software NMI
Function/Example
ARTICCSR
ARTCSR
Register
SPICSR
MCCSR
ADCSR
MCRC
SICSR
SCISR
SICSR
TASR
TBSR
Label
MISR
MISR
N/A
N/A
Priority
Highest
Priority
Lowest
Priority
I1
I1
I1
Order
1
1
1
1
1
H
H
H
Halt
from
Exit
yes
yes
yes
yes
yes
yes
yes
no
no
no
no
no
no
no
no
no
I0
I0
I0
0
0
1
1
0
1)
FFECh-FFEDh
FFFCh-FFFDh
FFEAh-FFEBh
N
N
N
FFFAh-FFFBh
FFEEh-FFEFh
FFFEh-FFFFh
FFE8h-FFE9h
FFE6h-FFE7h
FFE4h-FFE5h
FFE2h-FFE3h
FFE0h-FFE1h
FFF8h-FFF9h
FFF6h-FFF7h
FFF4h-FFF5h
FFF2h-FFF3h
FFF0h-FFF1h
Address
Vector
Z
Z
Z
C
C
C