ST7MC2M9 STMicroelectronics, ST7MC2M9 Datasheet - Page 58

• Manufacturer Part Number: ST7MC2M9
• Description: 8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC,BRUSHLESS MOTOR CONTROL, 5 TIMERS, SPI, LINSCI(TM)
• Manufacturer: STMicroelectronics

Specifications of ST7MC2M9

• Hdflash Endurance: 100 cycles, data retention
• Clock Sources: crystal/ceramic resonator oscillators and by-pass for external clock, clock security system.
• Four Power Saving Modes: Halt, Active-Halt, Wait and Slow
• Main Clock Controller With: Real time base, Beep and Clock-out capabilities
• Two 16-bit Timers With: 2 input captures, 2 output compares, external clock input, PWM and pulse generator modes
• 8-bit Pwm Auto-reload Timer With: 2 input captures, 4 PWM outputs, output compare and time base interrupt, external clock with event detector

ST7MC1xx/ST7MC2xx
I/O PORTS (Cont’d)
9.5.1 I/O Port Implementation
The I/O port register configurations are summa-
rised as follows.
Standard Ports
PA4, PA2:0, PB5:0, PC7:4,
PD7:6, PE5:0, PF5:0, PG7:0, PH7:0
Table 12. Port Configuration
58/309
1
floating input
pull-up input
open drain output
push-pull output
Port A
Port C
Port D
Port G
Port H
Port B
Port E
Port F
Port
MODE
PA7, PA5
PA6, PA3
PA2:0
PB7
PB6
PB5:0
PC7:4
PC3, PC1
PC2, PC0
PD7, PD0
PD6, PD3, PD1
PD5, PD4, PD2
PE5:0
PF5:0
PG7:0
PH7:0
Pin name
DDR
OR = 0
floating
floating
floating
floating
floating
floating
floating
floating
floating
floating
floating
floating
floating
floating
floating
floating
0
0
1
1
OR
0
1
0
1
Input
floating interrupt
floating interrupt
floating interrupt
floating interrupt
pull-up interrupt
pull-up interrupt
pull-up interrupt
pull-up interrupt
Interrupt Ports
PA6, PA3, PB6, PC3, PC1, PD5, PD4, PD2 (with
pull-up)
PA7, PA5, PB7, PC2, PC0, PD6, PD3, PD1 (with-
out pull-up)
OR = 1
pull-up
pull-up
pull-up
pull-up
pull-up
pull-up
pull-up
pull-up
floating input
pull-up interrupt input
open drain output
push-pull output
floating input
floating interrupt input
open drain output
push-pull output
MODE
MODE
open drain
open drain
open drain
open drain
open drain
open drain
open drain
open drain
open drain
open drain
open drain
open drain
open drain
open drain
open drain
open drain
OR = 0
Output
DDR
DDR
push-pull
push-pull
push-pull
push-pull
push-pull
push-pull
push-pull
push-pull
push-pull
push-pull
push-pull
push-pull
push-pull
push-pull
push-pull
push-pull
0
0
1
1
0
0
1
1
OR = 1
OR
OR
0
1
0
1
0
1
0
1