ST7MC2M9 STMicroelectronics, ST7MC2M9 Datasheet - Page 51

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ST7MC2M9

Manufacturer Part Number
ST7MC2M9
Description
8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC,BRUSHLESS MOTOR CONTROL, 5 TIMERS, SPI, LINSCI(TM)
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST7MC2M9

Hdflash Endurance
100 cycles, data retention
Clock Sources
crystal/ceramic resonator oscillators and by-pass for external clock, clock security system.
Four Power Saving Modes
Halt, Active-Halt, Wait and Slow
Main Clock Controller With
Real time base, Beep and Clock-out capabilities
Two 16-bit Timers With
2 input captures, 2 output compares, external clock input, PWM and pulse generator modes
8-bit Pwm Auto-reload Timer With
2 input captures, 4 PWM outputs, output compare and time base interrupt, external clock with event detector

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POWER SAVING MODES (Cont’d)
8.3 WAIT MODE
Wait mode places the MCU in a low power con-
sumption mode by stopping the CPU.
This power saving mode is selected by calling the
‘WFI’ instruction.
All peripherals remain active. During Wait mode,
the I[1:0] bits of the CC register are forced to ‘10’,
to enable all interrupts. All other registers and
memory remain unchanged. The MCU remains in
Wait mode until an interrupt or RESET occurs,
whereupon the Program Counter branches to the
starting address of the interrupt or Reset service
routine.
The MCU will remain in Wait mode until a Reset or
an Interrupt occurs, causing it to wake up.
Refer to
Figure
27.
Figure 27. Wait Mode Flow-chart
Note:
1. Before servicing an interrupt, the CC register is
pushed on the stack. The I[1:0] bits of the CC reg-
ister are set to the current software priority level of
the interrupt routine and recovered when the CC
register is popped.
WFI INSTRUCTION
N
INTERRUPT
Y
OR SERVICE INTERRUPT
FETCH RESET VECTOR
256 OR 4096 CPU CLOCK
ST7MC1xx/ST7MC2xx
OSCILLATOR
PERIPHERALS
OSCILLATOR
PERIPHERALS
OSCILLATOR
PERIPHERALS
CPU
I[1:0] BITS
CPU
I[1:0] BITS
CPU
I[1:0] BITS
N
CYCLE DELAY
RESET
Y
XX
OFF
OFF
ON
ON
ON
ON
ON
ON
ON
10
10
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