ST72321AR6-Auto STMicroelectronics, ST72321AR6-Auto Datasheet - Page 152

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ST72321AR6-Auto

Manufacturer Part Number
ST72321AR6-Auto
Description
8-bit MCU for automotive with 32 Kbyte Flash, 10-bit ADC, timers, SPI, SCI and I2C interfaces
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72321AR6-Auto

Hdflash Endurance
100 cycles, data retention 20 years
Clock Sources
crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
4 Power Saving Modes
Halt, Active Halt, Wait and Slow
Serial communications interface (SCI)
15.7.6
152/243
Table 76.
Extended receive prescaler division register (SCIERPR)
This register allows setting of the extended prescaler rate division factor for the receive
circuit.
SCIERPR
Bit
7:6 SCP[1:0]
5:3 SCT[2:0]
2:0 SCR[2:0]
7
Name
SCIBRR register description
First SCI Prescaler
SCI Transmitter rate divisor
SCI Receiver rate divisor
6
These 2 prescaling bits allow several standard clock division ranges.
00: PR prescaling factor = 1
01: PR prescaling factor = 3
10: PR prescaling factor = 4
11: PR prescaling factor = 13
These 3 bits, in conjunction with the SCP1 and SCP0 bits define the total division
applied to the bus clock to yield the transmit rate clock in conventional Baud Rate
Generator mode.
000: TR dividing factor = 1
001: TR dividing factor = 2
010: TR dividing factor = 4
011: TR dividing factor = 8
100: TR dividing factor = 16
101: TR dividing factor = 32
110: TR dividing factor = 64
111: TR dividing factor = 128
These 3 bits, in conjunction with the SCP[1:0] bits define the total division applied
to the bus clock to yield the receive rate clock in conventional Baud Rate
Generator mode.
000: RR dividing factor = 1
001: RR dividing factor = 2
010: RR dividing factor = 4
011: RR dividing factor = 8
100: RR dividing factor = 16
101: RR dividing factor = 32
110: RR dividing factor = 64
111: RR dividing factor = 128
5
Doc ID 13829 Rev 1
4
ERPR[7:0]
RW
Function
3
2
Reset value: 0000 0000 (00h)
1
ST72321xx-Auto
0

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