ST72321AR6-Auto STMicroelectronics, ST72321AR6-Auto Datasheet - Page 156

• Manufacturer Part Number: ST72321AR6-Auto
• Description: 8-bit MCU for automotive with 32 Kbyte Flash, 10-bit ADC, timers, SPI, SCI and I2C interfaces
• Manufacturer: STMicroelectronics

Specifications of ST72321AR6-Auto

• Hdflash Endurance: 100 cycles, data retention 20 years
• Clock Sources: crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
• 4 Power Saving Modes: Halt, Active Halt, Wait and Slow

I2C bus interface (I2C)
16.3
16.3.1
16.3.2
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General description
In addition to receiving and transmitting data, this interface converts it from serial to parallel
format and vice versa, using either an interrupt or polled handshake. The interrupts are
enabled or disabled by software. The interface is connected to the I
(SDAI) and by a clock pin (SCLI). It can be connected both with a standard I
fast I
Mode selection
The interface can operate in the four following modes:
●
●
By default, it operates in slave mode.
The interface automatically switches from slave to master after it generates a START
condition and from master to slave in case of arbitration loss or a STOP generation, allowing
then Multimaster capability.
Communication flow
In Master mode, it initiates a data transfer and generates the clock signal. A serial data
transfer always begins with a start condition and ends with a stop condition. Both start and
stop conditions are generated in master mode by software.
In Slave mode, the interface is capable of recognizing its own address (7- or 10-bit), and the
General Call address. The General Call address detection may be enabled or disabled by
software.
Data and addresses are transferred as 8-bit bytes, MSB first. The first byte(s) following the
start condition contain the address (one in 7-bit mode, two in 10-bit mode). The address is
always transmitted in Master mode.
A 9th clock pulse follows the 8 clock cycles of a byte transfer, during which the receiver must
send an acknowledge bit to the transmitter. Refer to
Figure 66. I
Acknowledge may be enabled and disabled by software.
The I
The speed of the I
I
2
C (up to 400 kHz).
2
Slave transmitter/receiver
Master transmitter/receiver
2
C bus. This selection is made by software.
C interface address and/or general call address can be selected by software.
SCL
SDA
2
CONDITION
C bus protocol
START
2
C interface may be selected between standard (up to 100 kHz) and fast
MSB
1
Doc ID 13829 Rev 1
2
Figure
8
66.
ACK
9
2
C bus by a data pin
CONDITION
STOP
ST72321xx-Auto
2
C bus and a
VR02119B