TMP86xy49UG/F/NG Toshiba, TMP86xy49UG/F/NG Datasheet - Page 107

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TMP86xy49UG/F/NG

Manufacturer Part Number
TMP86xy49UG/F/NG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP86xy49UG/F/NG

Package
LQFP64/QFP64/SDIP64
Rom Types (m=mask,p=otp,f=flash)
M/P/F
Rom Size
16/32/60
Ram Size
512/1K/2K
Driver Led
13
Driver Lcd
-
Spi/sio Channels
2
Uart/sio Channels
2
I2c/sio Channels
1
High-speed Serial Output
-
Adc 8-bit Channels
-
Adc 10-bit Channels
16
Da Converter Channels
-
Timer Counter 18-bit Channel
-
Timer Counter 16-bit Channel
2
Timer Counter 8-bit Channel
4
Motor Channels
-
Watchdog Timer
Y
Dual Clock
Y
Clock Gear
-
Number Of I/o Ports
56
Power Supply (v)
4.5 to 5.5
8.3 Function
Example :Generating a pulse which is high-going for 800 µs and low-going for 200 µs
Example :After stopping PPG, setting the PPG pin to a high-level to restart PPG
Match to TC1DRB
Match to TC1DRA
Write to TC1CR
TC1CR<TFF1>
(fc = 16 MHz)
(fc = 16 MHz)
Internal reset
LD
LDW
LDW
LD
LD
LDW
LDW
LD
:
LD
LD
LD
LD
Setting port
(TC1CR), 10000111B
(TC1DRA), 007DH
(TC1DRB), 0019H
(TC1CR), 10010111B
Setting port
(TC1CR), 10000111B
(TC1DRA), 007DH
(TC1DRB), 0019H
(TC1CR), 10010111B
:
(TC1CR), 10000111B
(TC1CR), 10000100B
(TC1CR), 00000111B
(TC1CR), 00010111B
Figure 8-7
Data output
Page 90
shared with PPG output
Timer F/F1
TC1CR<TC1S> clear
Set
Clear
Toggle
INTTC1 interrupt request
I/O port output latch
PPG
; Sets the PPG mode, selects the source clock
; Sets the cycle (1 ms ÷ 2
; Sets the low-level pulse width (200 µs ÷ 2
; Starts the timer
; Sets the PPG mode, selects the source clock
; Sets the cycle (1 ms ÷ 2
; Sets the low-level pulse width (200 µs ÷ 2
; Starts the timer
; Stops the timer
; Sets the timer mode
; Sets the PPG mode, TFF1 = 0
; Starts the timer
D
Q
Output
R
Q
Function output
7
7
/fc ms = 007DH)
/fc µs = 007DH)
Port output
enable
7
7
/fc = 0019H)
/fc = 0019H)
PPG pin
TMP86PM49UG

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