dsp56167 Freescale Semiconductor, Inc, dsp56167 Datasheet - Page 103

• Manufacturer Part Number: dsp56167
• Description: Advance Information 16-bit Digital Signal Processor
• Manufacturer: Freescale Semiconductor, Inc

MOTOROLA
Programming Environment:
External Chip Enable Operation
A new control bit called External Chip Enable (ECHIPEN) has been added to the Bus
Control Register 2 (BCR2[15] at X:$FFDA), to switch BR and PEREN from their
current mode of operation to the new one.
Note: Since, this feature does not alter the BR and PEREN functions while the DSP is
ECHIPEN is preset to 0 during processor reset. Therefore, upon coming out of reset,
BR and PEREN function as in the DSP56166. This means that BR asserts during
external memory access (both program and data) and during external peripheral
access. PEREN is asserted during external peripheral accesses only.
When ECHIPEN is set to 1 via software programming, BR only asserts during
external memory (program and data) access and PEREN asserts only during external
peripheral accesses.
If ECHIPEN is now cleared to 0 via software programming, then BR and PEREN
functionality reverts back to be the same as when the chip has just come out of reset.
Where:
EC
P
*
EC
15 14 13 12 11 10
Figure 4-16 Port A Bus Control Register 2 (BCR2), X:$FFDA
in the Bus Slave Mode of operation, all subsequent discussion assume that the
external bus is in the Bus Master Mode of operation.
External Chip Enable; preset to 0 during processor reset
External Peripheral Wait States; preset to 0 during processor reset
reserved bits; write 0 for future compatibility
*
Special Design Considerations for Conversions from DSP56166 to DSP56167
*
*
*
DSP56167/D, Rev. 1
*
9
*
8
*
7
*
6
*
5
*
P4 P3 P2 P1 P0
4
3
2
Design Considerations
1
0
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