dsp56167 Freescale Semiconductor, Inc, dsp56167 Datasheet - Page 17

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dsp56167

Manufacturer Part Number
dsp56167
Description
Advance Information 16-bit Digital Signal Processor
Manufacturer
Freescale Semiconductor, Inc
Datasheet
MOTOROLA
MODC/IRQC
RESET
Signal Name
Table 1-8 Interrupt and Mode Control Signals (Continued)
Signal
Input
Input
Type
Input
Input
during
Reset
State
Mode Select C/External Interrupt Request C— This input has
two functions:
MODC is read and internally latched in the DSP when the
processor exits the Reset state. MODA, MODB, and MODC
select the initial chip operating mode. Several clock cycles
(depending on PLL stabilization time) after leaving the Reset
state, the MODC signal changes to external interrupt request
IRQC. After reset, the chip operating mode can be changed by
software. The IRQC input is an external interrupt request that
indicates that an external device is requesting service. It may
be programmed to be level-sensitive or negative-edge-
triggered. If level sensitive triggering is selected, an external
pull up resistor is required for wired-OR operation.
Reset — This input is a direct hardware reset on the processor.
When RESET is asserted low, the DSP is initialized and placed
in the Reset state. A Schmitt trigger input is used for noise
immunity. When the RESET signal is deasserted, the initial
chip operating mode is latched from the MODA, MODB, and
MODC signals. The internal reset signal is deasserted
synchronous with the internal clocks.
DSP56167/D, Rev. 1
1.
2.
to select the initial chip operating mode, and
after synchronization, to allow an external device to
request a DSP interrupt.
Signal Description
Interrupt and Mode Control
Signal/Pin Descriptions
1-11

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