dsp56167 Freescale Semiconductor, Inc, dsp56167 Datasheet - Page 51

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dsp56167

Manufacturer Part Number
dsp56167
Description
Advance Information 16-bit Digital Signal Processor
Manufacturer
Freescale Semiconductor, Inc
Datasheet
MOTOROLA
Note:
Num
External
118
119
120
(Output)
(Output)
Internal
H0–H7
HREQ
(Input)
(Input)
HACK
HR/W
Delay from HEN deassertion to HREQ assertion for RXL
read
write
read, TXL write
Delay from HEN deassertion to HREQ assertion for TXL
Delay from HEN assertion to HREQ deassertion for RXL
1.
2.
3.
4.
3
3
“Host synchronization delay (t
external asynchronous input signal, determine whether it is high or low, and synchronize it to the
internal clock.
See
HREQ is pulled up by 1 k
Only if two consecutive reads from one of these registers are executed
Host Port Considerations
Figure 2-22 Host Interrupt Vector Register (IVR) Read
106
3
112
Table 2-12 Host I/O Timing (Continued)
100
Figure 2-21 Host Synchronization Delay
Characteristics
107
.
DSP56167/D, Rev. 1
HSDL
101
)” is the time period required for the DSP56167 to sample any
in the section on
Data Valid
103
109
Design Considerations
113
108
102
t
t
HSDL
HSDL
Min
13.7
+ 3T + 4
+ 2T + 4
100
Host I/O (HI) Timing
2T + 16.4
Max
Specifications
.
AA0793
AA0792
Unit
ns
ns
ns
2-25

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