mc33905s Freescale Semiconductor, Inc, mc33905s Datasheet - Page 59

• Manufacturer Part Number: mc33905s
• Description: System Basis Chip Gen2 With High Speed Can And Lin Interface
• Manufacturer: Freescale Semiconductor, Inc

MUX AND RAM REGISTERS
Analog Integrated Circuit Device Data
Freescale Semiconductor
The following tables contain register bit meaning arranged by register address, from address 0_000 to address 1_0100
Table 14. Internal Memory Registers A, B, C and D, RAM_A, RAM_B, RAM_C and RAM_D
Table 13. MUX Register
b7 b6 b5
[b_15 b_14] 0_0000 [P/N]
Bits
000
001
010
011
100
101
110
111
b4
b3
MOSI First Byte [15-8]
0
1
0
1
[b_15 b_14] 0_0xxx [P/N]
Condition for default
MOSI First Byte [15-8]
Condition for default
Condition for default
Condition for default
Condition for default
01 00 _ 000 P
Default state
01 00 _ 001 P
01 00 _ 010 P
01 00 _ 011 P
01 00 _ 100 P
Default state
Default state
Default state
Default state
INT 2k - Select device internal 2kohm resistor between AMUX and GND. This resistor allows the measurement of a voltage proportional to
MUX_2, MUX_1, MUX_0 - Selection of external input signal or internal signal to be measured at MUX-OUT terminal
V
DD
regulator current recopy. Ratio is approx 1/97. Requires an external resistor or selection of Internal 2K (bit 3)
I/O-att - When I/O-0 (or I/O-1) is selected with b7,b6,b5=100 (or 101), b3 selects attenuation or gain
Attenuation is approx 4 for device with V
DETAIL OF CONTROL BITS AND REGISTER MAPPING
Internal 2 kohm resistor disable. An external resistor must be connected between AMUX and GND.
Attenuation is approx 6 for device with V
POR, 5V-CAN off, any mode different from
MUX_2
Gain is approx 1.3 for device with V
bit 7
Gain is approx 2 for device with V
Voltage at VSENSE terminal. Refer to electrical table for attenuation ratio (approx 5)
Voltage at VSUP_1 terminal. Refer to electrical table for attenuation ratio (approx 5)
0
Ram a7
Ram b7
Ram c7
Ram d7
Bit 7
0
0
0
0
All functions disable. No output voltage at MUX-OUT terminal
MUX_1
Normal
bit 6
Voltage at I/O-0. Attenuation or gain is selected by bit 3.
Voltage at I/O-1. Attenuation or gain is selected by bit 3.
0
Ram a6
Ram b6
Ram c6
Ram d6
Bit 6
between I/O-0 (or I/O-1) and MUX-OUT terminal
Device internal voltage reference (approx 2.5V)
0
0
0
0
Device internal temperature sensor voltage
MUX_0
Internal 2 kohm resistor enable.
bit 5
0
Ram a5
Ram b5
Ram c5
Ram d5
the V
Bit 5
DD
0
0
0
0
DD
DD
DD
DD
=3.3V (Ref to electrical table for exact attenuation value)
Description
=5V (Ref to electrical table for exact attenuation value)
=5V (Ref to electrical table for exact gain value)
=3.3V (Ref to electrical table for exact gain value)
MOSI Second Byte, bits 7-0
output current.
MOSI Second Byte, bits 7-0
Int 2K
bit 4
N/A
Ram a4
Ram b4
Ram c4
Ram d4
Bit 4
0
0
0
0
DETAIL OF CONTROL BITS AND REGISTER MAPPING
POR
POR
POR
POR
I/O-att
POR
bit 3
Ram a3
Ram b3
Ram d3
Ram c3
0
Bit 3
0
0
0
0
bit 2
Ram a2
Ram b2
Ram c2
Ram d2
X
SERIAL PERIPHERAL INTERFACE
Bit 2
0
0
0
0
Ram a1
Ram b1
Ram c1
Ram d1
bit 1
Bit 1
X
0
0
0
0
Ram a0
Ram b0
Ram d0
Ram c0
bit 0
Bit 0
X
0
0
0
0
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