lf3310 LOGIC Devices Incorporated, lf3310 Datasheet - Page 8

• Manufacturer Part Number: lf3310
• Description: Horizontal / Vertical Digital Image Filter
• Manufacturer: LOGIC Devices Incorporated

DEVICES INCORPORATED
I/D Register in the forward data path
on the next clock cycle is fed into the
first I/D Register in the reverse data
path. Bit 5 in Configuration Register 1
configures the filter for an even or odd
number of taps.
When interleaved data is fed through
the device and an even tap filter is
desired, the filter should be config-
ured for an even number of taps (Bit 5
of CR
length should match the number of
data sets interleaved together. When
interleaved data is to be fed through
the device and an odd tap filter is
desired, the filter should be set
to Odd-Tap Interleave Mode. Bit
0 of Configuration Register 1 config-
ures the filter for Odd-Tap Interleave
Mode. When the filter is configured
for Odd-Tap Interleave Mode, data
from the next to last I/D Register in
the forward data path is fed into the
first I/D Register in the reverse data
path.
When the filter is configured for an
odd number of taps (interleaved or
non-interleaved modes), the filter is
structured such that the center data
value is aligned simultaneously at the
A and B inputs of the last ALU in the
forward data path. In order to achieve
the correct result, the user must divide
the coefficient by two.
Data Reversal
Data reversal circuitry is placed after
F
IGURE
1
set to “0”) and the I/D Register
10. D
LIFO A
LIFO B
TXFR
ATA
R
EVERSAL
the multiplexer which routes data
from the forward data path to the
reverse data path (see Figure 10).
When decimating, the data stream
must be reversed in order for data
to be properly aligned at the inputs
of the ALUs. When data reversal is
enabled, the circuitry uses a pair of
LIFOs to reverse the order of the data
sent to the reverse data path. When
TXFR goes LOW, the LIFO sending
data to the reverse data path becomes
the LIFO receiving data from the for-
ward data path, and the LIFO receiv-
ing data from the forward data path
becomes the LIFO sending data to the
reverse data path. The device must
see a HIGH to LOW transition of
F
IGURE
VERTICAL RSL
11. H
VRSL
4
3-0
ORIZONTAL AND
8
Horizontal / Vertical Digital Image Filter
32
24
5
DATA OUT
DATA IN
SELECT
32
32
12
12
LIMIT
RND
V
ERTICAL
TXFR in order to switch LIFOs. If dec-
imating by N, TXFR should go low
once every N clock cycles. When data
reversal is disabled, the circuitry func-
tions like an I/D Register. When feed-
ing interleaved data through the filter,
data reversal should be disabled. Bit 6
of Configuration Register 1 enables or
disables data reversal.
Horizontal Rounding
The horizontal filter output may be
rounded by adding the contents of one
of the sixteen horizontal round reg-
isters to the horizontal filter output
(see Figure 11). Each round register
is 32-bits wide and user-programma-
ble. This allows the filter’s output to
Video Imaging Products
R
DATA OUT
OUND
DATA IN
SELECT
32
32
12
12
LIMIT
RND
/S
ELECT
32
24
5
/L
HRSL
HORIZONTAL RSL
IMIT
4
9/14/2005-LDS.3310-I
3-0
C
LF3310
IRCUITRY