lf3310 LOGIC Devices Incorporated, lf3310 Datasheet - Page 12

• Manufacturer Part Number: lf3310
• Description: Horizontal / Vertical Digital Image Filter
• Manufacturer: LOGIC Devices Incorporated

DEVICES INCORPORATED
There is a separate bank for each mul-
tiplier. Each bank can hold 256 12-bit
coefficients. The banks are loaded
using an LF Interface
separate LF Interface
zontal and vertical banks. Coefficient
bank loading is discussed in the LF
Interface
Configuration and Control Registers
The Configuration Registers deter-
mine how the HV Filter operates.
Tables 2 through 7 show the formats
of the six configuration registers.
There are three types of control regis-
ters: round, select, and limit. There
are sixteen round registers for the hor-
izontal filter and sixteen for the ver-
tical filter. Each register is 32-bits
wide. HRSL
mine which horizontal and vertical
round registers respectively are used
F
F
IGURE
IGURE
HCF/VCF
HCF/VCF
HLD/VLD
HLD/VLD
TM
12. C
13. C
CLK
11-0
CLK
11-0
section.
3-0
W1: Configuration Register loaded with new data on this rising clock edge.
W2: Select Register loaded with new data on this rising clock edge.
W3: Round Register loaded with new data on this rising clock edge.
W4: Limit Register loaded with new data on this rising clock edge.
W1: Coefficient Set 1 written to coefficient banks during this clock cycle.
W2: Coefficient Set 2 written to coefficient banks during this clock cycle.
W3: Coefficient Set 3 written to coefficient banks during this clock cycle.
and VRSL
OEFFICIENT
ONFIGURATION
TM
TM
ADDR
. There is a
for the hori-
ADDR
CONFIG REG
3-0
1
1
deter-
COEFFICIENT SET 1
DATA
B
COEF
ANK
/C
1
0
ONTROL
W1
ADDR
L
SELECT REG
OADING
2
for rounding.
There are sixteen select registers for
the horizontal filter and sixteen for the
vertical filter. Each register is 5-bits
wide. HRSL
mine which horizontal and vertical
select registers respectively are used
in the select circuitry.
There are sixteen limit registers for
the horizontal filter and sixteen for the
vertical filter. Each register is 24-bits
wide and stores both an upper and
lower limit value. The lower limit is
stored in bits 11-0 and the upper limit
is stored in bits 23-12. HRSL
VRSL
and vertical limit registers respec-
tively are used for limiting when lim-
iting is enabled. Configuration and
Control Register loading is discussed
in the LF Interface
DATA
R
COEF
EGISTER
S
3-0
1
7
EQUENCE
W2
determine which horizontal
ADDR
ADDR
3-0
W1
3
L
2
COEFFICIENT SET 2
OADING
DATA
and VRSL
COEF
ROUND REGISTER
TM
12
1
0
section.
Horizontal / Vertical Digital Image Filter
DATA
S
EQUENCE
3-0
2
deter-
3-0
DATA
COEF
and
3
7
DATA
ADDR
W2
4
3
LF Interface
The Horizontal and Vertical LF Inter-
faces
the horizontal and vertical coefficient
banks respectively. They are also
used to load data into the Configura-
tion and Control Registers.
The following section describes how
the Horizontal LF Interface
The Horizontal and Vertical LF Inter-
faces
HLD and HCF
VLD and VCF
tion will describe how the Vertical LF
Interface
HLD is used to enable and disable the
Horizontal LF Interface
goes LOW, the Horizontal LF Inter-
face
first value fed into the interface on
HCF
mines what the interface is going to
COEFFICIENT SET 3
W3
ADDR
COEF
Video Imaging Products
TM
LIMIT REGISTER
11-0
TM
TM
4
0
is enabled for data input. The
are used to load data into
are identical in function. If
DATA
is an address which deter-
TM
works.
TM
1
11-0
11-0
DATA
COEF
, the following sec-
are replaced with
2
7
W4
TM
9/14/2005-LDS.3310-I
. When HLD
W3
TM
LF3310
works.